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ORCIDDavid Roberts
This is just a disambiguation page, and is not intended to be the bibliography of an actual person. The links to all actual bibliographies of persons of the same or a similar name can be found below. Any publication listed on this page has not been assigned to an actual author yet. If you know the true author of one of the publications listed below, you are welcome to contact us.
Person information
Other persons with the same name
- David Roberts 0001
![[0000-0003-0648-6585]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0003-0648-6585")
— University of Oxford, John Radcliffe Hospital, UK (and 1 more)
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2020 – today
- 2022
[j8]Andrew Goh, David Roberts, Jesse Wainright, Narendra Bhadra, Kevin L. Kilgore, Niloy Bhadra, Tina Vrabec:
Evaluation of Activated Carbon and Platinum Black as High-Capacitance Materials for Platinum Electrodes. Sensors 22(11): 4278 (2022)
2010 – 2019
- 2019
- [c21]Xiao Liu, David Roberts, Rachata Ausavarungnirun, Onur Mutlu, Jishen Zhao:
Binary Star: Coordinated Reliability in Heterogeneous Memory Systems for High Performance and Scalability. MICRO 2019: 807-820 - 2018
- [c20]Manish Gupta, Vilas Sridharan, David Roberts, Andreas Prodromou, Ashish Venkat, Dean M. Tullsen, Rajesh K. Gupta:
Reliability-Aware Data Placement for Heterogeneous Memory Architecture. HPCA 2018: 583-595 - 2017
- [j7]Larry Freil, Ceara Byrne, Giancarlo Valentin, Clint Zeagler, David Roberts, Thad Starner, Melody Moore Jackson:
Canine-Centered Computing. Found. Trends Hum. Comput. Interact. 10(2): 87-164 (2017) - [c19]Simon Faulkner, Stephen D. Elton, Tharaka A. Lamahewa, David Roberts:
A reconfigurable wideband streaming channeliser for RF sensing applications: A multiple GPU-based implementation. ICSPCS 2017: 1-8 - 2016
- [c18]Amin Farmahini Farahani, David Roberts, Nuwan Jayasena:
Analytical Study on Bandwidth Efficiency of Heterogeneous Memory Systems. MEMSYS 2016: 104-118 - [c17]Manish Gupta, David Roberts, Mitesh R. Meswani, Vilas Sridharan, Dean M. Tullsen, Rajesh K. Gupta:
Reliability and Performance Trade-off Study of Heterogeneous Memories. MEMSYS 2016: 395-401 - 2015
- [c16]David Roberts, Amin Farmahini Farahani, Kevin Cheng, Nathan Hu, David Mayhew, Michael Ignatowski:
NMI: A new memory interface to enable innovation. Hot Chips Symposium 2015: 1 - [c15]Mitesh R. Meswani, Sergey Blagodurov, David Roberts, John Slice, Mike Ignatowski, Gabriel H. Loh:
Heterogeneous memory architectures: A HW/SW approach for mixing die-stacked and off-package memories. HPCA 2015: 126-136 - [c14]Chun-Yi Su, David Roberts, Edgar A. León, Kirk W. Cameron, Bronis R. de Supinski, Gabriel H. Loh, Dimitrios S. Nikolopoulos:
HpMC: An Energy-aware Management System of Multi-level Memory Architectures. MEMSYS 2015: 167-178 - 2014
- [c13]Mitesh R. Meswani, Gabriel H. Loh, Sergey Blagodurov, David Roberts, John Slice, Mike Ignatowski:
Toward efficient programmer-managed two-level memory hierarchies in exascale computers. Co-HPC@SC 2014: 9-16 - 2012
- [c12]Jichuan Chang, Parthasarathy Ranganathan, Trevor N. Mudge, David Roberts, Mehul A. Shah, Kevin T. Lim:
A limits study of benefits from nanostore-based future data-centric system architectures. Conf. Computing Frontiers 2012: 33-42 - [c11]Jialiang Yi, Pengfei Wang, Phillip C. Taylor, Peter J. Davison, Pádraig F. Lyons, Daniel H. Liang, Stuart Brown, David Roberts:
Distribution network voltage control using energy storage and demand side response. ISGT Europe 2012: 1-8 - [e1]Ronan Boulic, Carolina Cruz-Neira, Kiyoshi Kiyokawa, David Roberts:
JVRC12: Joint Virtual Reality Conference of ICAT - EGVE - EuroVR, Madrid, Spain, 2012. Proceedings. Eurographics Association 2012, ISBN 978-3-905674-40-8 [contents]
2000 – 2009
- 2009
- [j6]Vincent S. Smith, Simon D. Rycroft, Kehan T. Harman, Ben Scott, David Roberts:
Scratchpads: a data-publishing framework to build, share and manage information on the diversity of life. BMC Bioinform. 10(S-14): 6 (2009) - [j5]David Roberts, Taeho Kgil, Trevor N. Mudge:
Integrating NAND flash devices onto servers. Commun. ACM 52(4): 98-103 (2009) - [j4]Eiman Kanjo, Jean Bacon, David Roberts, Peter Landshoff:
MobSens: Making Smart Phones Smarter. IEEE Pervasive Comput. 8(4): 50-57 (2009) - [c10]David Roberts, Taeho Kgil, Trevor N. Mudge:
Using non-volatile memory to save energy in servers. DATE 2009: 743-748 - 2008
- [j3]David Roberts, Nam Sung Kim, Trevor N. Mudge:
On-chip cache device scaling limits and effective fault repair techniques in future nanoscale technology. Microprocess. Microsystems 32(5-6): 244-253 (2008) - [c9]Taeho Kgil, David Roberts, Trevor N. Mudge:
Improving NAND Flash Based Disk Caches. ISCA 2008: 327-338 - 2007
- [c8]David Roberts, Nam Sung Kim, Trevor N. Mudge:
On-Chip Cache Device Scaling Limits and Effective Fault Repair Techniques in Future Nanoscale Technology. DSD 2007: 570-578 - [c7]Priya Dey, David Roberts:
A Conceptual Framework for Modelling Crowd Behaviour. DS-RT 2007: 193-200 - 2006
- [j2]Shidhartha Das, David Roberts, Seokwoo Lee, Sanjay Pant, David T. Blaauw, Todd M. Austin, Krisztián Flautner, Trevor N. Mudge:
A self-tuning DVS processor using delay-error detection and correction. IEEE J. Solid State Circuits 41(4): 792-804 (2006) - 2005
- [c6]David Roberts, Todd M. Austin, David T. Blaauw, Trevor N. Mudge, Krisztián Flautner:
Error Analysis for the Support of Robust Voltage Scaling. ISQED 2005: 65-70 - 2004
- [c5]Krisztián Flautner, David Flynn, David Roberts, Dipesh I. Patel:
IEM926: An Energy Efficient SoC with Dynamic Voltage Scaling. DATE 2004: 324-329 - 2003
- [c4]Thomas M. Parks, David Roberts:
Distributed Process Networks in Java. IPDPS 2003: 138
1990 – 1999
- 1991
- [c3]Rob Horning, Leith Johnson, Larry Thayer, Daniel Li, Victoria Meier, Casey Dowdell, David Roberts:
System design for a low cost PA-RISC desktop workstation. Compcon 1991: 208-213 - [c2]Bob Foster, Curtis Alexander, Allen Roberts, David Roberts:
An ECL RISC multiprocessor. Compcon 1991: 289-292 - 1990
- [j1]David Roberts:
Knowledge Creation by Information Retrieval. J. Documentation 46(4): 365-367 (1990) - [c1]David Roberts, Tim Layman, George Taylor:
An ECL RISC microprocessor designed for two level cache. Compcon 1990: 228-231
Coauthor Index
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