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ORCIDPartha Biswas
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2020 – today
- 2022
[j5]Md. Takim Sarker
, Shuvo Saha, Partha Biswas, Md. Tanvir Islam, Mohammad Ashik Sheikh, Md. Nahid Hasan, Nadira Islam, Md. Mobenul Islam Rabbe, Md. Oliullah Rafi:
Identification of blood-based inflammatory biomarkers for the early-stage detection of acute myocardial infarction. Netw. Model. Anal. Health Informatics Bioinform. 11(1): 28 (2022)
2000 – 2009
- 2008
- [c8]Partha Biswas, Girish Venkataramani:
Comprehensive isomorphic subtree enumeration. CASES 2008: 177-186 - 2007
- [j4]Partha Biswas, Nikil D. Dutt, Laura Pozzi, Paolo Ienne:
Introduction of Architecturally Visible Storage in Instruction Set Extensions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(3): 435-446 (2007) - [i1]Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Laura Pozzi, Paolo Ienne:
ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement. CoRR abs/0710.4820 (2007) - 2006
- [j3]Aviral Shrivastava, Partha Biswas, Ashok Halambi, Nikil D. Dutt, Alexandru Nicolau:
Compilation framework for code size reduction using reduced bit-width ISAs (rISAs). ACM Trans. Design Autom. Electr. Syst. 11(1): 123-146 (2006) - [j2]Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Laura Pozzi, Paolo Ienne:
ISEGEN: an iterative improvement-based ISE generation technique for fast customization of processors. IEEE Trans. Very Large Scale Integr. Syst. 14(7): 754-762 (2006) - [c7]Partha Biswas, Nikil D. Dutt, Paolo Ienne, Laura Pozzi:
Automatic identification of application-specific functional units with architecturally visible storage. DATE 2006: 212-217 - [c6]Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Paolo Ienne, Laura Pozzi:
Performance and Energy Benefits of Instruction Set Extensions in an FPGA Soft Core. VLSI Design 2006: 651-656 - 2005
- [j1]Partha Biswas, Nikil D. Dutt:
Code Size Reduction in Heterogeneous-Connectivity-Based DSPs Using Instruction Set Extensions. IEEE Trans. Computers 54(10): 1216-1226 (2005) - [c5]Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Laura Pozzi, Paolo Ienne:
ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement. DATE 2005: 1246-1251 - 2004
- [c4]Partha Biswas, Vinay Choudhary, Kubilay Atasu, Laura Pozzi, Paolo Ienne, Nikil D. Dutt:
Introduction of local memory elements in instruction set extensions. DAC 2004: 729-734 - 2003
- [c3]Partha Biswas, Nikil D. Dutt:
Reducing code size for heterogeneous-connectivity-based VLIW DSPs through synthesis of instruction set extensions. CASES 2003: 104-112 - 2002
- [c2]Ashok Halambi, Aviral Shrivastava, Partha Biswas, Nikil D. Dutt, Alexandru Nicolau:
An Efficient Compiler Technique for Code Size Reduction Using Reduced Bit-Width ISAs. DATE 2002: 402-408 - [c1]Alexandru Nicolau, Nikil D. Dutt, Aviral Shrivastava, Partha Biswas, Ashok Halambi:
A Design Space Exploration Framework for Reduced Bit-Width Instruction Set Architecture (rISA) Design . ISSS 2002: 120-125
Coauthor Index
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