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ORCIDJohn P. Fishburn
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2010 – 2019
- 2018
[j13]John P. Fishburn:
Search-based opening book construction. J. Int. Comput. Games Assoc. 40(1): 2-14 (2018)
2000 – 2009
- 2002
- [j12]John P. Fishburn:
Solving a system of difference constraints with variables restricted to a finite set. Inf. Process. Lett. 82(3): 143-144 (2002) - [j11]Charles J. Alpert, Anirudh Devgan, John P. Fishburn, Stephen T. Quay:
Correction to "interconnect synthesis without wire tapering". IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21(4): 497-497 (2002) - [c8]Kanad Chakraborty, David E. Long, John P. Fishburn, Kishore Singhal, Lun Ye, Christopher Ortiz:
A signal integrity-driven buffer insertion technique for post-routing noise and delay optimization. CICC 2002: 23-26 - 2001
- [j10]Charles J. Alpert, Anirudh Devgan, John P. Fishburn, Stephen T. Quay:
Interconnect synthesis without wire tapering. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(1): 90-104 (2001)
1990 – 1999
- 1999
- [c7]John P. Fishburn:
Optimization-based calibration of a static timing analyzer to path delay measurements. ISCAS (6) 1999: 186-189 - 1998
- [j9]Harsha Sathyamurthy, Sachin S. Sapatnekar
, John P. Fishburn:
Speeding up pipelined circuits through a combination of gate sizing and clock skew optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(2): 173-182 (1998) - 1997
- [c6]John P. Fishburn:
Shaping a VLSI wire to minimize Elmore delay. ED&TC 1997: 244-251 - 1995
- [c5]Harsha Sathyamurthy, Sachin S. Sapatnekar, John P. Fishburn:
Speeding up pipelined circuits through a combination of gate sizing and clock skew optimization. ICCAD 1995: 467-470 - 1992
- [c4]John P. Fishburn:
LATTIS: An Iterative Speedup Heuristic for Mapped Logic. DAC 1992: 488-491 - 1990
- [j8]John P. Fishburn:
Clock Skew Optimization. IEEE Trans. Computers 39(7): 945-951 (1990) - [c3]John P. Fishburn:
A Depth-Decreasing Heuristic for Combinational Logic: Or How To Convert a Ripple-Carry Adder Into A Carry-Lookahead Adder Or Anything in-between. DAC 1990: 361-364
1980 – 1989
- 1988
- [j7]Jyuo-Min Shyu, Alberto L. Sangiovanni-Vincentelli, John P. Fishburn, Alfred E. Dunlop:
Optimization-based transistor sizing. IEEE J. Solid State Circuits 23(2): 400-409 (1988) - 1986
- [j6]Kung-Chao Chu, John P. Fishburn, Peter Honeyman, Y. Edmund Lien:
A Database-Driven VLSI Design System. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 5(1): 180-187 (1986) - 1985
- [c2]Dwight D. Hill, John P. Fishburn, Mary Diane Palmer Leland:
Effective use of virtual grid compaction in macro-module generators. DAC 1985: 777-780 - 1983
- [j5]Raphael A. Finkel, John P. Fishburn:
Improved Speedup Bounds for Parallel Alpha-Beta Search. IEEE Trans. Pattern Anal. Mach. Intell. 5(1): 89-92 (1983) - [j4]John P. Fishburn:
Another optimization of alpha-beta search. SIGART Newsl. 84: 37-38 (1983) - [c1]Kung-Chao Chu, John P. Fishburn, Peter Honeyman, Y. Edmund Lien:
Vdd - A VLSI Design Database System. Engineering Design Applications 1983: 25-37 - 1982
- [j3]Raphael A. Finkel, John P. Fishburn:
Parallelism in Alpha-Beta Search. Artif. Intell. 19(1): 89-106 (1982) - [j2]John P. Fishburn, Raphael A. Finkel:
Quotient Networks. IEEE Trans. Computers 31(4): 288-295 (1982) - 1980
- [j1]John P. Fishburn:
An optimization of alpha-beta search. SIGART Newsl. 72: 29-31 (1980)
Coauthor Index
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