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Journal Articles
- 2021
[j5]Azalia Mirhoseini
, Anna Goldie, Mustafa Yazgan, Joe Wenjie Jiang, Ebrahim M. Songhori, Shen Wang, Young-Joon Lee, Eric Johnson, Omkar Pathak, Azade Nazi, Jiwoo Pak, Andy Tong, Kavya Srinivasa, William Hang, Emre Tuncer, Quoc V. Le, James Laudon, Richard Ho, Roger Carpenter, Jeff Dean:
A graph placement methodology for fast chip design. Nat. 594(7862): 207-212 (2021)- 2019
- [j4]Hee-Ju Yu, Seunghoon Baek, Young-Joon Lee, Ara Cho, Jeong-Hwan Mun:
The radish genome database (RadishGD): an integrated information resource for radish genomics. Database J. Biol. Databases Curation 2019: baz009 (2019) - 2015
- [j3]Daehyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim:
Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory). IEEE Trans. Computers 64(1): 112-125 (2015) - 2013
- [j2]Young-Joon Lee, Sung Kyu Lim:
Ultrahigh Density Logic Designs Using Monolithic 3-D Integration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(12): 1892-1905 (2013) - 2011
- [j1]Young-Joon Lee, Sung Kyu Lim:
Co-Optimization and Analysis of Signal, Power, and Thermal Interconnects in 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(11): 1635-1648 (2011)
Conference and Workshop Papers
- 2021
- [c15]Zixuan Jiang, Ebrahim M. Songhori, Shen Wang, Anna Goldie, Azalia Mirhoseini, Joe W. J. Jiang, Young-Joon Lee, David Z. Pan:
Delving into Macro Placement with Reinforcement Learning. MLCAD 2021: 1-3 - 2014
- [c14]Young-Joon Lee, Sung Kyu Lim:
On GPU bus power reduction with 3D IC technologies. DATE 2014: 1-6 - 2013
- [c13]Moongon Jung, Taigon Song, Yang Wan, Young-Joon Lee, Debabrata Mohapatra, Hong Wang, Greg Taylor, Devang Jariwala, Vijay Pitchumani, Patrick Morrow, Clair Webb, Paul Fischer, Sung Kyu Lim:
How to reduce power in 3D IC designs: A case study with OpenSPARC T2 core. CICC 2013: 1-4 - [c12]Young-Joon Lee, Daniel B. Limbrick, Sung Kyu Lim:
Power benefit study for ultra-high density transistor-level monolithic 3D ICs. DAC 2013: 104:1-104:10 - 2012
- [c11]Young-Joon Lee, Inki Hong, Sung Kyu Lim:
Slew-aware buffer insertion for through-silicon-via-based 3D ICs. CICC 2012: 1-8 - [c10]Young-Joon Lee, Geon Yong Park, Ho Kuen Song, Hee Yong Youn:
A Load Balancing Scheme for Distributed Simulation Based on Multi-agent System. COMPSAC Workshops 2012: 613-618 - [c9]Young-Joon Lee, Patrick Morrow, Sung Kyu Lim:
Ultra high density logic designs using transistor-level monolithic 3D integration. ICCAD 2012: 539-546 - [c8]Young-Joon Lee, Sung Kyu Lim:
Fast delay estimation with buffer insertion for through-silicon-via-based 3D interconnects. ISQED 2012: 228-335 - [c7]Dae Hyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh, Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim:
3D-MAPS: 3D Massively parallel processor with stacked memory. ISSCC 2012: 188-190 - 2010
- [c6]Young-Joon Lee, Sung Kyu Lim:
Timing analysis and optimization for 3D stacked multi-core microprocessors. 3DIC 2010: 1-7 - [c5]Michael B. Healy, Krit Athikulwongse, Rohan Goel, Mohammad M. Hossain, Dae Hyun Kim, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Moongon Jung, Brian Ouellette, Mohit Pathak, Hemant Sane, Guanhao Shen, Dong Hyuk Woo, Xin Zhao, Gabriel H. Loh, Hsien-Hsin S. Lee, Sung Kyu Lim:
Design and analysis of 3D-MAPS: A many-core 3D processor with stacked memory. CICC 2010: 1-4 - [c4]Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee, Sung Kyu Lim, David Z. Pan:
TSV stress aware timing analysis with applications to 3D-IC layout optimization. DAC 2010: 803-806 - [c3]Mohit Pathak, Young-Joon Lee, Thomas Moon, Sung Kyu Lim:
Through-silicon-via management during 3D physical design: When to add and how many? ICCAD 2010: 387-394 - 2009
- [c2]Young-Joon Lee, Yoon Jo Kim, Gang Huang, Muhannad S. Bakir, Yogendra K. Joshi, Andrei G. Fedorov, Sung Kyu Lim:
Co-design of signal, power, and thermal distribution networks for 3D ICs. DATE 2009: 610-615 - [c1]Young-Joon Lee, Rohan Goel, Sung Kyu Lim:
Multi-functional interconnect co-optimization for fast and reliable 3D stacked ICs. ICCAD 2009: 645-651
Informal and Other Publications
- 2021
- [i2]Zixuan Jiang, Ebrahim M. Songhori, Shen Wang, Anna Goldie, Azalia Mirhoseini, Joe W. J. Jiang, Young-Joon Lee, David Z. Pan:
Delving into Macro Placement with Reinforcement Learning. CoRR abs/2109.02587 (2021) - 2020
- [i1]Azalia Mirhoseini, Anna Goldie, Mustafa Yazgan, Joe W. J. Jiang, Ebrahim M. Songhori, Shen Wang, Young-Joon Lee, Eric Johnson, Omkar Pathak, Sungmin Bae, Azade Nazi, Jiwoo Pak, Andy Tong, Kavya Srinivasa, William Hang, Emre Tuncer, Anand Babu, Quoc V. Le, James Laudon, Richard Ho, Roger Carpenter, Jeff Dean:
Chip Placement with Deep Reinforcement Learning. CoRR abs/2004.10746 (2020)
Coauthor Index
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