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Conference and Workshop Papers
- 2006
[c12]Francesco Pessolano:
The Holy Grail of Holistic Low-Power Design. PATMOS 2006: 671- 2005
- [c11]Nic Mokhoff, Yervant Zorian, Kamalesh N. Ruparel, Hao Nham, Francesco Pessolano, Kee Sup Kim:
How to determine the necessity for emerging solutions. DAC 2005: 274-275 - [c10]Maurice Meijer, Francesco Pessolano, José Pineda de Gyvez:
Limits to performance spread tuning using adaptive voltage and body biasing. ISCAS (1) 2005: 5-8 - [c9]Maurice Meijer, Francesco Pessolano, José Pineda de Gyvez:
Glitch-free discretely programmable clock generation on chip. ISCAS (2) 2005: 1839-1842 - 2004
- [c8]Carel J. van der Poel, Francesco Pessolano, Raf Roovers, Frans Widdershoven, G. de Walle, Emile H. L. Aarts, Phillip Christie:
On ambient intelligence, needful things and process technologies. ESSCIRC 2004: 3-10 - [c7]Maurice Meijer, Francesco Pessolano, José Pineda de Gyvez:
Technology exploration for adaptive power and frequency scaling in 90nm CMOS. ISLPED 2004: 14-19 - [c6]Francesco Pessolano, R. I. M. P. Meijer:
A 260ps Quasi-static ALU in 90nm CMOS. PATMOS 2004: 372-380 - 2003
- [c5]G. Privitera, Francesco Pessolano:
Analysis of High-Speed Logic Families. PATMOS 2003: 2-10 - 2002
- [c4]Francesco Pessolano, Joep L. W. Kessels, Ad M. G. Peeters:
MDSP: A High-Performance Low-Power DSP Architecture. PATMOS 2002: 35-44 - 2000
- [c3]Dave Protheroe, Francesco Pessolano:
An Objective Measure of Digital System Design Quality. ISQED 2000: 227-233 - [c2]Francesco Pessolano, Joep L. W. Kessels:
Asynchronous First-in First-out Queues. PATMOS 2000: 178-186 - 1999
- [c1]Francesco Pessolano:
Heterogeneous Clustered Processors: Organisation and Design. Euro-Par 1999: 1296-1300
Coauthor Index
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