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Junichi Hirase
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2010 – 2019
- 2014
- [j3]Junichi Hirase:
Verification of Moore's Law Using Actual Semiconductor Production Data. IEICE Trans. Electron. 97-C(6): 599-608 (2014) - [j2]Junichi Hirase:
Introduction of Yield Quadrant and Yield Capability Index for VLSI Manufacturing. IEICE Trans. Electron. 97-C(6): 609-618 (2014)
2000 – 2009
- 2008
- [c13]Junichi Hirase:
Defect Detection Rate through IDDQ for Production Testing. ATS 2008: 199-205 - 2005
- [c12]Junichi Hirase, Yoshiyuki Goi, Yoshiyuki Tanaka:
IDDQ Testing Method using a Scan Pattern for Production Testing. Asian Test Symposium 2005: 18-21 - [c11]Junichi Hirase, Tatsuya Furukawa:
Chip Identification using the Characteristic Dispersion of Transistor. Asian Test Symposium 2005: 188-193 - 2003
- [c10]Junichi Hirase:
Test Pattern Length Required to Reach the Desired Fault Coverage. Asian Test Symposium 2003: 508 - 2002
- [c9]Junichi Hirase:
High Precision Result Evaluation of VLSI. Asian Test Symposium 2002: 21-26 - 2001
- [c8]Junichi Hirase:
Test Time Reduction through Minimum Execution of Tester-Hardware Setting Instructions. Asian Test Symposium 2001: 173-178 - [c7]Junichi Hirase:
Yield Increase of VLSI after Redundancy-Repairing. Asian Test Symposium 2001: 353-358 - 2000
- [c6]Junichi Hirase, Shinichi Yoshimura:
Faster processing for microprocessor functional ATPG. Asian Test Symposium 2000: 191-197
1990 – 1999
- 1999
- [c5]Junichi Hirase, Shinichi Yoshimura, Tomohisa Sczaki:
Automatic Test Pattern Generation for Improving the Fault Coverage of Microprocessors. Asian Test Symposium 1999: 13-19 - [c4]Junichi Hirase, Naoki Shindou, Kouji Akahori:
Scan Chain Diagnosis Using IDDQ Current Measurement. Asian Test Symposium 1999: 153-157 - 1998
- [c3]Junichi Hirase:
Economical Importance of the Maximum Chip Area. Asian Test Symposium 1998: 64- - 1995
- [j1]Junichi Hirase, Masanori Hamada:
The Effect of CMOS VLSI IDDq Measurement on Defect Level. IEICE Trans. Inf. Syst. 78-D(7): 839-844 (1995) - [c2]Junichi Hirase:
Improvement of the Defect Level of Micro-computer LSI Testing. ITC 1995: 377-383 - [c1]Junichi Hirase:
Study on the Costs of On-site VLSI Testing. ITC 1995: 438-443
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