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Akira Tada
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2020 – today
- 2020
- [c5]Akira Tada, Masahiro Umehira, Xiaoyan Wang, Shigeki Takeda:
DPD based HPA linearizer using in-band operation point estimation pilot for mobile device applications. ICSPCS 2020: 1-7
2000 – 2009
- 2009
- [j8]Kayoko Seto, Masaaki Iijima, Tetsuya Hirose, Masahiro Numa, Akira Tada, Takashi Ipposhi:
A Look-ahead Active Body-biasing scheme for SOI-SRAM with dynamic VDDM control. IEICE Electron. Express 6(8): 456-460 (2009) - 2008
- [j7]Akira Tada, Hiromi Notani, Genichi Tanaka, Toshiaki Iwamatsu, Takashi Ipposhi, Masayuki Terai, Masaaki Iijima, Masahiro Numa:
Delayed-ABC SOI for crosstalk noise repair. IEICE Electron. Express 5(9): 354-360 (2008) - [j6]Masaaki Iijima, Kayoko Seto, Masahiro Numa, Akira Tada, Takashi Ipposhi:
Low Power SRAM with Boost Driver Generating Pulsed Word Line Voltage for Sub-1V Operation. J. Comput. 3(5): 34-40 (2008) - 2007
- [j5]Akira Tada, Hiromi Notani, Genichi Tanaka, Takashi Ipposhi, Masaaki Iijima, Masahiro Numa:
Charge recycling in MTCMOS circuits with block dividing. IEICE Electron. Express 4(18): 562-568 (2007) - [j4]Masaaki Iijima, Masayuki Kitamura, Masahiro Numa, Akira Tada, Takashi Ipposhi, Shigeto Maegawa:
Boosted Voltage Scheme with Active Body-Biasing Control on PD-SOI for Ultra Low Voltage Operation. IEICE Trans. Electron. 90-C(4): 666-674 (2007) - [j3]Masaaki Iijima, Kayoko Seto, Masahiro Numa, Akira Tada, Takashi Ipposhi:
Look-Ahead Dynamic Threshold Voltage Control Scheme for Improving Write Margin of SOI-7T-SRAM. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(12): 2691-2694 (2007) - [c4]Masaaki Iijima, Masayuki Kitamura, Masahiro Numa, Akira Tada, Takashi Ipposhi:
Ultra Low Voltage Operation with Bootstrap Scheme for Single Power Supply SOI-SRAM. VLSI Design 2007: 609-614 - 2006
- [j2]Akira Tada, Hiromi Notani, Masahiro Numa:
A novel power gating scheme with charge recycling. IEICE Electron. Express 3(12): 281-286 (2006) - [j1]Masaaki Iijima, Kenji Hamada, Masayuki Kitamura, Masahiro Numa, Akira Tada, Takashi Ipposhi:
Dynamic threshold voltage control for dual supply voltage scheme on PD-SOI. IEICE Electron. Express 3(21): 453-458 (2006) - [c3]Masayuki Kitamura, Masaaki Iijima, Kenji Hamada, Masahiro Numa, Hiromi Notani, Akira Tada, Shigeto Maegawa:
High Performance CMOS Circuit by Using Charge Recycling Active Body-Bias Controlled SOI. PATMOS 2006: 393-402 - 2004
- [c2]Kazuki Fukuoka, Masaaki Iijima, Kenji Hamada, Masahiro Numa, Akira Tada:
Leakage power reduction for clock gating scheme on PD-SOI. ISCAS (2) 2004: 613-616 - [c1]Kazuki Fukuoka, Masaaki Iijima, Kenji Hamada, Masahiro Numa, Akira Tada:
A Novel Layout Approach Using Dual Supply Voltage Technique on Body-Tied PD-SOI. PATMOS 2004: 423-432
Coauthor Index
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