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2020 – today
- 2024
[j2]Junjie An, Zhidao Zhou, Linfang Wang, Wang Ye, Weizeng Li, Hanghang Gao, Zhi Li, Jinghui Tian, Yan Wang, Hongyang Hu, Jinshan Yue, Lingyan Fan, Shibing Long, Qi Liu, Chunmeng Dou:
Write-Verify-Free MLC RRAM Using Nonbinary Encoding for AI Weight Storage at the Edge. IEEE Trans. Very Large Scale Integr. Syst. 32(2): 283-290 (2024)- [c4]Weizeng Li, Linfang Wang, Zhi Li, Wang Ye, Zhidao Zhou, Haiyang Zhou, Hanghang Gao, Jinshan Yue, Hongyang Hu, Fengman Liu, Qing Luo, Chunmeng Dou:
A 2T P-Channel Logic Flash Cell for Reconfigurable Interconnection in Chiplet-Based Computing-In-Memory Accelerators. ISCAS 2024: 1-4 - [c3]Linfang Wang, Weizeng Li, Zhidao Zhou, Hanghang Gao, Zhi Li, Wang Ye, Hongyang Hu, Jing Liu, Jinshan Yue, Jianguo Yang, Qing Luo, Chunmeng Dou, Qi Liu, Ming Liu:
34.9 A Flash-SRAM-ADC-Fused Plastic Computing-in-Memory Macro for Learning in Neural Networks in a Standard 14nm FinFET Process. ISSCC 2024: 582-584 - [c2]Menggan Liu, Zhi Li, Wendong Lu, Kaifei Chen, Jiebin Niu, Fuxi Liao, Zijing Wu, Congyan Lu, Weizeng Li, Di Geng, Nianduan Lu, Chunmeng Dou, Guanhua Yang, Ling Li, Ming Liu:
First Demonstration of Monolithic Three-Dimensional Integration of Ultra-High Density Hybrid IGZO/Si SRAM and IGZO 2T0C DRAM Achieving Record-Low Latency (5000s). VLSI Technology and Circuits 2024: 1-2 - 2023
- [j1]Wang Ye
, Linfang Wang, Zhidao Zhou, Junjie An, Weizeng Li, Hanghang Gao, Zhi Li, Jinshan Yue, Hongyang Hu, Xiaoxin Xu, Jianguo Yang, Jing Liu, Dashan Shang, Feng Zhang, Jinghui Tian, Chunmeng Dou, Qi Liu, Ming Liu:
A 28-nm RRAM Computing-in-Memory Macro Using Weighted Hybrid 2T1R Cell Array and Reference Subtracting Sense Amplifier for AI Edge Inference. IEEE J. Solid State Circuits 58(10): 2839-2850 (2023) - 2022
- [c1]Linfang Wang, Junjie An, Wang Ye, Weizeng Li, Hanghang Gao, Yangu He, Jianfeng Gao, Jinshan Yue, Lingyan Fan, Chunmeng Dou:
RRAM Computing-in-Memory Using Transient Charge Transferring for Low-Power and Small-Latency AI Edge Inference. APCCAS 2022: 497-500
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