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2020 – today
- 2024
[j5]Weihang Tan
, Sin-Wei Chiu, Antian Wang, Yingjie Lao, Keshab K. Parhi:
PaReNTT: Low-Latency Parallel Residue Number System and NTT-Based Long Polynomial Modular Multiplication for Homomorphic Encryption. IEEE Trans. Inf. Forensics Secur. 19: 1646-1659 (2024)- [c7]Weihang Tan, Yingjie Lao, Keshab K. Parhi:
Area-Efficient Matrix-Vector Polynomial Multiplication Architecture for ML-KEM Using Interleaving and Folding Transformation. ISCAS 2024: 1-5 - [i5]Weihang Tan, Timothy Anglea, Yongqiang Wang:
Analysis of Dead Reckoning Accuracy in Swarm Robotics System. CoRR abs/2407.04840 (2024) - 2023
- [j4]Weihang Tan, Antian Wang, Xinmiao Zhang, Yingjie Lao, Keshab K. Parhi:
High-Speed VLSI Architectures for Modular Polynomial Multiplication via Fast Filtering and Applications to Lattice-Based Cryptography. IEEE Trans. Computers 72(9): 2454-2466 (2023) - [c6]Antian Wang, Bingyin Zhao, Weihang Tan, Yingjie Lao:
NNTesting: Neural Network Fault Attacks Detection Using Gradient-Based Test Vector Generation. DAC 2023: 1-6 - [c5]Weihang Tan, Yingjie Lao, Keshab K. Parhi:
KyberMat: Efficient Accelerator for Matrix-Vector Polynomial Multiplication in CRYSTALS-Kyber Scheme via NTT and Polyphase Decomposition. ICCAD 2023: 1-9 - [i4]Weihang Tan, Sin-Wei Chiu, Antian Wang, Yingjie Lao, Keshab K. Parhi:
PaReNTT: Low-Latency Parallel Residue Number System and NTT-Based Long Polynomial Modular Multiplication for Homomorphic Encryption. CoRR abs/2303.02237 (2023) - [i3]Weihang Tan, Yingjie Lao, Keshab K. Parhi:
KyberMat: Efficient Accelerator for Matrix-Vector Polynomial Multiplication in CRYSTALS-Kyber Scheme via NTT and Polyphase Decomposition. CoRR abs/2310.04618 (2023) - 2022
- [c4]Antian Wang, Weihang Tan, Keshab K. Parhi, Yingjie Lao:
Integral Sampler and Polynomial Multiplication Architecture for Lattice-based Cryptography. DFT 2022: 1-6 - [i2]Antian Wang, Weihang Tan, Keshab K. Parhi, Yingjie Lao:
Integral Sampler and Polynomial Multiplication Architecture for Lattice-based Cryptography. CoRR abs/2208.14270 (2022) - 2021
- [j3]Antian Wang, Weihang Tan, Yuejiang Wen, Yingjie Lao:
NoPUF: A Novel PUF Design Framework Toward Modeling Attack Resistant PUFs. IEEE Trans. Circuits Syst. I Regul. Pap. 68(6): 2508-2521 (2021) - [j2]Weihang Tan, Benjamin M. Case, Antian Wang, Shuhong Gao, Yingjie Lao:
High-Speed Modular Multiplier for Lattice-Based Cryptosystems. IEEE Trans. Circuits Syst. II Express Briefs 68(8): 2927-2931 (2021) - [j1]Weihang Tan, Benjamin M. Case, Gengran Hu, Shuhong Gao, Yingjie Lao:
An Ultra-Highly Parallel Polynomial Multiplier for the Bootstrapping Algorithm in a Fully Homomorphic Encryption Scheme. J. Signal Process. Syst. 93(6): 643-656 (2021) - [c3]Weihang Tan, Antian Wang, Yingjie Lao, Xinmiao Zhang, Keshab K. Parhi:
Pipelined High-Throughput NTT Architecture for Lattice-Based Cryptography. AsianHOST 2021: 1-4 - [i1]Weihang Tan, Antian Wang, Yingjie Lao, Xinmiao Zhang, Keshab K. Parhi:
Low-Latency VLSI Architectures for Modular Polynomial Multiplication via Fast Filtering and Applications to Lattice-Based Cryptography. CoRR abs/2110.12127 (2021) - 2020
- [c2]Weihang Tan, Antian Wang, Yunhao Xu, Yingjie Lao:
Area-Efficient Pipelined VLSI Architecture for Polar Decoder. ISVLSI 2020: 352-357
2010 – 2019
- 2019
- [c1]Weihang Tan, Aengran Au, Benjamin Aase, Shuhong Aao, Yingjie Lao:
An Efficient Polynomial Multiplier Architecture for the Bootstrapping Algorithm in a Fully Homomorphic Encryption Scheme. SiPS 2019: 85-90
Coauthor Index
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