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ORCIDStephen W. Melvin
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2010 – 2019
- 2016
[j4]Onur Mutlu, Rich Belgard, Thomas R. Gross, Norman P. Jouppi, John L. Hennessy, Steven A. Przybylski, Chris Rowen, Yale N. Patt, Wen-mei W. Hwu, Stephen W. Melvin, Michael Shebanow, Tse-Yu Yeh, Andy Wolfe:
Common Bonds: MIPS, HPS, Two-Level Branch Prediction, and Compressed Code RISC Processor. IEEE Micro 36(4): 70-85 (2016)
2000 – 2009
- 2002
- [c13]Stephen W. Melvin, Yale N. Patt:
Handling of packet dependencies: a critical issue for highly parallel network processors. CASES 2002: 202-209
1990 – 1999
- 1996
- [e1]Stephen W. Melvin, Steve Beaty:
Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 29, Paris, France, December 2-4, 1996. ACM/IEEE Computer Society 1996, ISBN 0-8186-7641-8 [contents] - 1995
- [j3]Stephen W. Melvin, Yale N. Patt:
Enhancing instruction scheduling with a block-structured ISA. Int. J. Parallel Program. 23(3): 221-243 (1995) - 1991
- [c12]Stephen W. Melvin, Yale N. Patt:
Exploiting Fine-Grained Parallelism Through a Combination of Hardware and Software Techniques. ISCA 1991: 287-296 - 1990
- [j2]Peter B. Danzig, Stephen W. Melvin:
High Resolution Timing with Low Resolution Clocks and A Microsecond Resolution Timer for Sun Workstations. ACM SIGOPS Oper. Syst. Rev. 24(1): 23-26 (1990)
1980 – 1989
- 1989
- [c11]Stephen W. Melvin, Yale N. Patt:
Performance benefits of large execution atomic units in dynamically scheduled machines. ICS 1989: 427-432 - 1988
- [c10]Stephen W. Melvin, Michael Shebanow, Yale N. Patt:
Hardware support for large atomic units in dynamically scheduled machines. MICRO 1988: 60-63 - [c9]Stephen W. Melvin, Yale N. Patt:
The Use of Microcode Instrumentation for Development, Debugging and Tuning of Operating System Kernels. SIGMETRICS 1988: 207-214 - 1987
- [j1]Alvin M. Despain, Yale N. Patt, Vason P. Srini, Philip Bitar, William R. Bush, C. Chien, Wayne Citrin, Barry Fagin, Wenwei Hwu, Stephen W. Melvin, Rick McGeer, Ashok Singhal, Michael Shebanow, Peter Van Roy:
Aquarius. SIGARCH Comput. Archit. News 15(1): 22-34 (1987) - [c8]Jeffrey D. Gee, Stephen W. Melvin, Yale N. Patt:
Advantages of Implementing PROLOG by Microprogramming a Host General Purpose Computer. ICLP 1987: 1-20 - [c7]James E. Wilson, Stephen W. Melvin, Michael Shebanow, Wen-mei W. Hwu, Yale N. Patt:
On tuning the microarchitecture of an HPS implementation of the VAX. MICRO 1987: 162-167 - [c6]Stephen W. Melvin, Yale N. Patt:
SPAM: a microcode based tool for tracing operating system events. MICRO 1987: 168-171 - 1986
- [c5]Yale N. Patt, Wen-mei W. Hwu, Stephen W. Melvin, Michael Shebanow, Chein Chen, Jiajuin Wei:
Experiments with HPS, a Restricted Data Flow Microarchitecture for High Performance Computers. COMPCON 1986: 254-258 - [c4]Jeffrey D. Gee, Stephen W. Melvin, Yale N. Patt:
The implementation of Prolog via VAX 8600 microcode. MICRO 1986: 68-74 - [c3]Yale N. Patt, Stephen W. Melvin, Wen-mei W. Hwu, Michael Shebanow, Chein Chen:
Run-time generation of HPS microinstructions from a VAX instruction stream. MICRO 1986: 75-81 - [c2]Stephen W. Melvin, Yale N. Patt:
A microcode-based environment for noninvasive performance analysis. MICRO 1986: 171-177 - 1985
- [c1]Yale N. Patt, Stephen W. Melvin, Wen-mei W. Hwu, Michael Shebanow:
Critical issues regarding HPS, a high performance microarchitecture. MICRO 1985: 109-116
Coauthor Index
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