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ORCID21st MICRO 1988: San Diego, California, USA
- Yale N. Patt:
Proceedings of the 21st Annual Workshop and Symposium on Microprogramming and Microarchitecture, 1988, San Diego, California, USA, November 28 - December 2, 1988. ACM/IEEE 1988, ISBN 0-8186-1919-8 - A. Bailas, Larry L. Kinney:
Evaluation of a concurrent error detection method for microprogrammed control units. 1-10 - J. H. Jacobs, Augustus K. Uht, R. C. Ord:
Modeling the effects of instruction queue loading on a static instruction stream micro-architecture. 11-20 - Pohua P. Chang, Wen-mei W. Hwu:
Trace selection for compiling large C application programs to microcode. 21-29 - Andrew Wolfe, John Paul Shen:
Flexible processors: a promising application-specific processor design approach. 30-39 - Ashok Singhal, Yale N. Patt:
Implementing a Prolog machine with multiple functional units. 41-49 - J. A. Chandross, H. V. Jagadish, Abhaya Asthana:
The trap as a control flow mechanism. 50-52 - James O. Bondi:
A microcoded real-time executive for numeric support nodes distributed within embedded networks. 54-56 - Yashwant K. Malaiya, Sheng Feng:
Design of a testable RISC-to-CISC control architecture. 57-59 - Stephen W. Melvin, Michael Shebanow, Yale N. Patt:
Hardware support for large atomic units in dynamically scheduled machines. 60-63 - Andrew R. Pleszkun, Gurindar S. Sohi:
Multiple instruction issue and single-chip processors. 64-66 - S. S. Ravi, Dechang Gu:
On approximation algorithms for microcode bit minimization. 67-69 - L. Shih, Christos A. Papachristou:
Mapping of micro data flow computations on parallel microarchitectures. 70-72 - Derek Wong:
A high-speed hardware unit for a subset of logic resolution. 73-78 - J. H. Chang, H. H. Chao, K. Lewis, M. Holland:
Control store implementation of a high performance VLSI CISC. 79-82 - Johannes M. Mulder, Robert J. Portier, A. Srivastava, R. in 't Velt:
Efficient macro-code emulation in hardwired pipelined processors. 83-90 - Vicki H. Allan:
Data dependency graph bracing. 91-93 - Michael Andrews, F. Lam:
A new rapid prototyping firmware (RPF) tool. 94-96 - Maurício Breternitz Jr., John Paul Shen:
Organization of array data for concurrent memory access. 97-99 - Edil S. T. Fernandes:
Microarchitecture modelling through ADL. 100-104 - Hartmut Feuerhahn:
A data-flow driven resource allocation in a retargetable microcode compiler. 105-107 - Steven E. Molnar, Mark C. Surles:
A microprogramming support tool for pipelined architectures. 108-110 - Ken Rimey, Paul N. Hilfinger:
Lazy data routing and greedy scheduling for application-specific signal processors. 111-115 - Bogong Su, Jian Wang, Jinshi Xia:
Global microcode compaction under timing constraints. 116-118 - Sergio D'Angelo, Lorenzo Lisca, Alberto Proserpio, Giacomo R. Sechi:
Microprogramming in multiprocessor data acquisition system. 120-133 - Elisabetta Binaghi, Gabriella Pasi
, Giacomo R. Sechi:
The proposal of a computing model for prototypes of microprogrammed machines solving complex problems. 134-138
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