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Maximilian Liehr
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2020 – today
- 2024
- [j5]Fan Zhang, Amitesh Sridharan, Wangxin He, Injune Yeo, Maximilian Liehr, Wei Zhang, Nathaniel C. Cady, Yu Cao, Jae-Sun Seo, Deliang Fan:
A 65-nm RRAM Compute-in-Memory Macro for Genome Processing. IEEE J. Solid State Circuits 59(7): 2093-2104 (2024) - 2023
- [j4]Hritom Das, Rocco D. Febbo, Sree Nirmillo Biswash Tushar, Nishith N. Chakraborty, Maximilian Liehr, Nathaniel C. Cady, Garrett S. Rose:
An Efficient and Accurate Memristive Memory for Array-Based Spiking Neural Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 4804-4815 (2023) - [c8]Fan Zhang, Wangxin He, Injune Yeo, Maximilian Liehr, Nathaniel C. Cady, Yu Cao, Jae-Sun Seo, Deliang Fan:
A 65nm RRAM Compute-in-Memory Macro for Genome Sequencing Alignment. ESSCIRC 2023: 117-120 - [c7]Hritom Das, Manu Rathore, Rocco Febbo, Maximilian Liehr, Nathaniel C. Cady, Garrett S. Rose:
RFAM: RESET-Failure-Aware-Model for HfO2-based Memristor to Enhance the Reliability of Neuromorphic Design. ACM Great Lakes Symposium on VLSI 2023: 281-286 - [c6]Mehrdad Morsali, Sepehr Tabrizchi, Maximilian Liehr, Nathaniel C. Cady, Mohsen Imani, Arman Roohi, Shaahin Angizi:
Deep Mapper: A Multi-Channel Single-Cycle Near-Sensor DNN Accelerator. ICRC 2023: 1-5 - [i1]Hritom Das, Rocco D. Febbo, Sree Nirmillo Biswash Tushar, Nishith N. Chakraborty, Maximilian Liehr, Nathaniel C. Cady, Garrett S. Rose:
An Efficient and Accurate Memristive Memory for Array-based Spiking Neural Networks. CoRR abs/2306.06551 (2023) - 2022
- [j3]Gokul Krishnan, Li Yang, Jingbo Sun, Jubin Hazra, Xiaocong Du, Maximilian Liehr, Zheng Li, Karsten Beckmann, Rajiv V. Joshi, Nathaniel C. Cady, Deliang Fan, Yu Cao:
Exploring Model Stability of Deep Neural Networks for Reliable RRAM-Based In-Memory Acceleration. IEEE Trans. Computers 71(11): 2740-2752 (2022) - [j2]Gokul Krishnan, Zhenyu Wang, Injune Yeo, Li Yang, Jian Meng, Maximilian Liehr, Rajiv V. Joshi, Nathaniel C. Cady, Deliang Fan, Jae-Sun Seo, Yu Cao:
Hybrid RRAM/SRAM in-Memory Computing for Robust DNN Acceleration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4241-4252 (2022) - [c5]Manu Rathore, Ryan Weiss, Mst Shamim Ara Shawkat, Garrett S. Rose, Maximilian Liehr, Minhaz Abedin, Sarah Rafiq, Nathaniel C. Cady:
A Compact Model for the Variable Switching Dynamics of HfO2 Memristors. MWSCAS 2022: 1-4 - 2021
- [j1]Sarah Rafiq, Jubin Hazra, Maximilian Liehr, Karsten Beckmann, Minhaz Abedin, Jodh S. Pannu, Sumit Kumar Jha, Nathaniel C. Cady:
Investigation of ReRAM Variability on Flow-Based Edge Detection Computing Using HfO2-Based ReRAM Arrays. IEEE Trans. Circuits Syst. I Regul. Pap. 68(7): 2900-2910 (2021) - [c4]Jubin Hazra, Maximilian Liehr, Karsten Beckmann, Minhaz Abedin, Sarah Rafiq, Nathaniel C. Cady:
Optimization of Switching Metrics for CMOS Integrated HfO2 based RRAM Devices on 300 mm Wafer Platform. IMW 2021: 1-4 - [c3]Gokul Krishnan, Jingbo Sun, Jubin Hazra, Xiaocong Du, Maximilian Liehr, Zheng Li, Karsten Beckmann, Rajiv V. Joshi, Nathaniel C. Cady, Yu Cao:
Robust RRAM-based In-Memory Computing in Light of Model Stability. IRPS 2021: 1-5 - [c2]Minhaz Abedin, Maximilian Liehr, Karsten Beckmann, Jubin Hazra, Sarah Rafiq, Nathaniel C. Cady:
In-memory Computation of Error-Correcting Codes Using a Reconfigurable HfOx ReRAM 1T1R Array. MWSCAS 2021: 593-598
2010 – 2019
- 2019
- [c1]Maximilian Liehr, Jubin Hazra, Karsten Beckmann, Wilkie Olin-Ammentorp, Nathaniel C. Cady, Ryan Weiss, Sagarvarma Sayyaparaju, Garrett S. Rose, Joseph Van Nostrand:
Fabrication and Performance of Hybrid ReRAM-CMOS Circuit Elements for Dynamic Neural Networks. ICONS 2019: 6:1-6:4
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last updated on 2024-08-05 21:23 CEST by the dblp team
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