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2010 – 2019
- 2010
[j3]Rex Kho, David Boursin, Martin Brox, Peter Gregorius, Heinz Hoenigschmid, Bianka Kho, Sabine Kieser, Daniel Kehrer, Maksim Kuzmenka, Udo Moeller, Pavel Veselinov Petkov, Manfred Plan, Michael Richter, Ian Russell, Kai Schiller, Ronny Schneider, Kartik Swaminathan, Bradley Weber, Julien Weber, Ingo Bormann, Fabien Funfrock, Mario Gjukic, Wolfgang Spirkl, Holger Steffens, Jörg Weller, Thomas Hein:
A 75 nm 7 Gb/s/pin 1 Gb GDDR5 Graphics Memory Device With Bandwidth Improvement Techniques. IEEE J. Solid State Circuits 45(1): 120-133 (2010)
2000 – 2009
- 2009
- [c8]Rex Kho, David Boursin, Martin Brox, Peter Gregorius, Heinz Hoenigschmid, Bianka Kho, Sabine Kieser, Daniel Kehrer, Maksim Kuzmenka, Udo Moeller, Pavel Veselinov Petkov, Manfred Plan, Michael Richter, Ian Russell, Kai Schiller, Ronny Schneider, Kartik Swaminathan, Bradley Weber, Julien Weber, Ingo Bormann, Fabien Funfrock, Mario Gjukic, Wolfgang Spirkl, Holger Steffens, Jörg Weller, Thomas Hein:
75nm 7Gb/s/pin 1Gb GDDR5 graphics memory device with bandwidth-improvement techniques. ISSCC 2009: 134-135 - 2007
- [c7]Zheng Gu, Peter Gregorius, Daniel Kehrer, Lydia Neumann, Evelyn Neuscheler, Thomas Rickes, Hermann Ruckerbauer, Ralf Schledz, Martin Streibl, Jürgen Zielbauer:
Cascading Techniques for a High-Speed Memory Interface. ISSCC 2007: 234-599 - 2005
- [c6]Hans-Dieter Wohlmuth, Daniel Kehrer:
A 24 GHz dual-modulus prescaler in 90nm CMOS. ISCAS (4) 2005: 3227-3230 - 2004
- [j2]Daniel Kehrer, Hans-Dieter Wohlmuth:
A 30-gb/s 70-mW one-stage 4: 1 multiplexer in 0.13-μm CMOS. IEEE J. Solid State Circuits 39(7): 1140-1147 (2004) - [c5]Hans-Dieter Wohlmuth, Daniel Kehrer:
A low power 13-Gb/s 2^7-1 pseudo random bit sequence generator IC in 120 nm bulk CMOS. SBCCI 2004: 233-236 - 2003
- [j1]Daniel Kehrer, Hans-Dieter Wohlmuth, Herbert Knapp, Martin Wurzer, Arpad L. Scholtz:
40-Gb/s 2: 1 multiplexer and 1: 2 demultiplexer in 120-nm standard CMOS. IEEE J. Solid State Circuits 38(11): 1830-1837 (2003) - [c4]Hans-Dieter Wohlmuth, Daniel Kehrer:
A 15 GHz 256/257 dual-modulus prescaler in 120 nm CMOS. ESSCIRC 2003: 77-80 - [c3]Daniel Kehrer, Hans-Dieter Wohlmuth:
A 20 Gb/s 82mW one-stage 4:1 multiplexer in 0.13 μm CMOS. ESSCIRC 2003: 385-388 - 2002
- [c2]Winfried Bakalski, Werner Simbürger, Daniel Kehrer, Hans-Dieter Wohlmuth, Mirjana Rest, Arpad L. Scholtz:
A monolithic 2.45 GHz, 0.56 W power amplifier with 45% PAE at 2.4 V in standard 25 GHz fT Si-bipolar. ISCAS (4) 2002: 803-806 - 2001
- [c1]Daniel Kehrer, Werner Simbürger, Hans-Dieter Wohlmuth, Arpad L. Scholtz:
Modeling of monolithic lumped planar transformers up to 20 GHz. CICC 2001: 401-404
Coauthor Index
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