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2020 – today
- 2024
[j15]Rodolfo Jordão
, Matthias Becker, Ingo Sander:
IDeSyDe: Systematic Design Space Exploration via Design Space Identification. ACM Trans. Design Autom. Electr. Syst. 29(5): 1-45 (2024)- [c66]Fahimeh Bahrami, Rodolfo Jordão, Ingo Sander, George Ungureanu:
Automatic Parallelization of Embedded Software via Hierarchical Process Network Transformations. FDL 2024: 1-9 - [c65]Rui Chen, Ingo Sander:
A Quantitative Type Approach to Formal Component-Based System Design. FDL 2024: 1-10 - [c64]Rodolfo Jordão, Fahimeh Bahrami, Yu Yang, Matthias Becker, Ingo Sander, Kathrin Rosvall:
Multi-objective preference-free exact design space exploration of static DSP on multicore platforms. FDL 2024: 1-9 - 2023
- [j14]Christofer Schwartz, Ingo Sander, Fredrik Bruhn, Mathias Persson, Joakim Ekblad, Christer Fuglesang:
Satellite Image Compression Guided by Regions of Interest. Sensors 23(2): 730 (2023) - 2022
- [c63]Rodolfo Jordão, Fahimeh Bahrami, Rui Chen, Ingo Sander:
A multi-view and programming language agnostic framework for model-driven engineering. FDL 2022: 1-8 - 2021
- [j13]Denis Silva Loubach, Ricardo Bonna, George Ungureanu, Ingo Sander, Ingemar Söderquist:
Classification and Mapping of Model Elements for Designing Runtime Reconfigurable Systems. IEEE Access 9: 156337-156360 (2021) - [j12]Seyed-Hosein Attarzadeh-Niaki, Ingo Sander, Mohammad Ahmadi:
An automated parallel simulation flow for cyber-physical system design. Integr. 77: 48-58 (2021) - [j11]George Ungureanu, José Edil Guimarães de Medeiros, Timmy Sundström, Ingemar Söderquist, Anders Åhlander, Ingo Sander:
ForSyDe-Atom: Taming Complexity in Cyber Physical System Design with Layers. ACM Trans. Embed. Comput. Syst. 20(2): 10:1-10:27 (2021) - [c62]Rodolfo Jordão, Ingo Sander, Matthias Becker:
Formulation of Design Space Exploration Problems by Composable Design Space Identification. DATE 2021: 1204-1207 - 2020
- [j10]Seyed-Hosein Attarzadeh-Niaki, Ingo Sander:
Heterogeneous co-simulation for embedded and cyber-physical systems design. Simul. 96(9) (2020) - [c61]George Ungureanu, Rodolfo Jordão, Ingo Sander:
Exploiting Dataflow Models for Parallel Simulation of Discrete Timed Systems. FDL 2020: 1-4
2010 – 2019
- 2019
- [j9]Ricardo Bonna, Denis Silva Loubach, George Ungureanu, Ingo Sander:
Modeling and Simulation of Dynamic Applications Using Scenario-Aware Dataflow. ACM Trans. Design Autom. Electr. Syst. 24(5): 58:1-58:29 (2019) - [c60]George Ungureanu, Timmy Sundström, Anders Åhlander, Ingo Sander, Ingemar Söderquist:
Formal Design, Co-Simulation and Validation of a Radar Signal Processing System. FDL 2019: 1-8 - 2018
- [j8]Kathrin Rosvall, Ingo Sander:
Flexible and Tradeoff-Aware Constraint-Based Design Space Exploration for Streaming Applications on Heterogeneous Platforms. ACM Trans. Design Autom. Electr. Syst. 23(2): 21:1-21:26 (2018) - [c59]George Ungureanu, José Edil G. de Medeiros, Ingo Sander:
Bridging discrete and continuous time models with atoms. DATE 2018: 277-280 - [c58]José Edil G. de Medeiros, George Ungureanu, Ingo Sander:
An algebra for modeling continuous time systems. DATE 2018: 861-864 - [c57]Kathrin Rosvall, Tage Mohammadat, George Ungureanu, Johnny Öberg, Ingo Sander:
Exploring Power and Throughput for Dataflow Applications on Predictable NoC Multiprocessors. DSD 2018: 719-726 - 2017
- [j7]Kim Grüttner, Ralph Görgen, Sören Schreiner, Fernando Herrera, Pablo Peñil, Julio L. Medina, Eugenio Villar, Gianluca Palermo, William Fornaciari, Carlo Brandolese, Davide Gadioli, Emanuele Vitali, Davide Zoni, Sara Bocchio, Luca Ceva, Paolo Azzoni, Massimo Poncino, Sara Vinco, Enrico Macii, Salvatore Cusenza, John M. Favaro, Raúl Valencia, Ingo Sander, Kathrin Rosvall, Nima Khalilzad, Davide Quaglia:
CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties. Microprocess. Microsystems 51: 39-55 (2017) - [j6]Maher Fakih, Alina Lenz, Mikel Azkarate-askasua, Javier Coronel, Alfons Crespo, Simon Davidmann, Juan Carlos Diaz Garcia, Nera González Romero, Kim Grüttner, Sören Schreiner, Razi Seyyedi, Roman Obermaisser, Adele Maleki, Johnny Öberg, Mohamed Tagelsir Mohammadat, Jon Pérez-Cerrolaza, Ingo Sander, Ingemar Söderquist:
SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems. Microprocess. Microsystems 52: 89-105 (2017) - [j5]Mohammad Ashjaei, Nima Khalilzad, Saad Mubeen, Moris Behnam, Ingo Sander, Luís Almeida, Thomas Nolte:
Designing end-to-end resource reservations in predictable distributed embedded systems. Real Time Syst. 53(6): 916-956 (2017) - [c56]Seyed-Hosein Attarzadeh-Niaki, Ingo Sander:
Automatic construction of models for analytic system-level design space exploration problems. DATE 2017: 670-673 - [c55]George Ungureanu, Ingo Sander:
A layered formal framework for modeling of cyber-physical systems. DATE 2017: 1715-1720 - [c54]Kathrin Rosvall, Nima Khalilzad, George Ungureanu, Ingo Sander:
Throughput Propagation in Constraint-Based Design Space Exploration for Mixed-Criticality Systems. RAPIDO 2017: 4 - [p1]Ingo Sander, Axel Jantsch, Seyed-Hosein Attarzadeh-Niaki:
ForSyDe: System Design Using a Functional Language and Models of Computation. Handbook of Hardware/Software Codesign 2017: 99-140 - 2016
- [j4]Seyed-Hosein Attarzadeh-Niaki, Ingo Sander:
An extensible modeling methodology for embedded and cyber-physical system design. Simul. 92(8): 771-794 (2016) - [c53]Ralph Görgen, Kim Grüttner, Fernando Herrera, Pablo Peñil, Julio L. Medina, Eugenio Villar, Gianluca Palermo, William Fornaciari, Carlo Brandolese, Davide Gadioli, Sara Bocchio, Luca Ceva, Paolo Azzoni, Massimo Poncino, Sara Vinco, Enrico Macii, Salvatore Cusenza, John M. Favaro, Raúl Valencia, Ingo Sander, Kathrin Rosvall, Davide Quaglia:
CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties. DSD 2016: 286-293 - [c52]Alina Lenz, Mikel Azkarate-Askasua Blazquez, Javier Coronel, Alfons Crespo, Simon Davidmann, Juan Carlos Diaz Garcia, Nera González Romero, Kim Grüttner, Roman Obermaisser, Johnny Öberg, Jon Pérez, Ingo Sander, Ingemar Söderquist:
SAFEPOWER Project: Architecture for Safe and Power-Efficient Mixed-Criticality Systems. DSD 2016: 294-300 - [c51]Nima Khalilzad, Kathrin Rosvall, Ingo Sander:
A modular design space exploration framework for multiprocessor real-time systems. FDL 2016: 1-7 - 2015
- [c50]Edoardo Paone, Francesco Robino, Gianluca Palermo, Vittorio Zaccaria, Ingo Sander, Cristina Silvano:
Customization of OpenCL applications for efficient task mapping under heterogeneous platform constraints. DATE 2015: 736-741 - [c49]Fernando Herrera, Ingo Sander, Kathrin Rosvall, Edoardo Paone, Gianluca Palermo:
An efficient joint analytical and simulation-based design space exploration flow for predictable multi-core systems. RAPIDO@HiPEAC 2015: 2:1-2:8 - [c48]Byron Navas, Ingo Sander, Johnny Öberg:
Towards cognitive reconfigurable hardware: Self-aware learning in RTR fault-tolerant SoCs. ReCoSoC 2015: 1-8 - [c47]Papa Issa Diallo, Seyed-Hosein Attarzadeh-Niaki, Francesco Robino, Ingo Sander, Joël Champeau, Johnny Öberg:
A formal, model-driven design flow for system simulation and multi-core implementation. SIES 2015: 254-263 - 2014
- [c46]Byron Navas, Johnny Öberg, Ingo Sander:
The upset-fault-observer: A concept for self-healing adaptive fault tolerance. AHS 2014: 89-96 - [c45]Kathrin Rosvall, Ingo Sander:
A constraint-based design space exploration framework for real-time applications on MPSoCs. DATE 2014: 1-6 - [c44]Gabriel Hjort Blindell, Christian Menne, Ingo Sander:
Synthesizing code for GPGPUs from abstract formal models. FDL 2014: 1-8 - [c43]Fernando Herrera, Ingo Sander:
An extensible infrastructure for modeling and time analysis of predictable embedded systems. FDL 2014: 1-8 - [c42]Byron Navas, Johnny Öberg, Ingo Sander:
On providing scalable self-healing adaptive fault-tolerance to RTR SoCs. ReConFig 2014: 1-6 - 2013
- [c41]Shuo Li, Nasim Farahini, Ahmed Hemani, Kathrin Rosvall, Ingo Sander:
System level synthesis of hardware for DSP applications using pre-characterized function implementations. CODES+ISSS 2013: 16:1-16:10 - [c40]Seyed-Hosein Attarzadeh-Niaki, Ingo Sander:
An automated parallel simulation flow for heterogeneous embedded systems. DATE 2013: 27-30 - [c39]Byron Navas, Ingo Sander, Johnny Öberg:
The RecoBlock SoC platform: a flexible array of reusable run-time-reconfigurable IP-blocks. DATE 2013: 833-838 - [c38]Fernando Herrera, Seyed-Hosein Attarzadeh-Niaki, Ingo Sander:
Towards a Modelling and Design Framework for Mixed-Criticality SoCs and Systems-of-Systems. DSD 2013: 989-996 - [c37]Fernando Herrera, Ingo Sander:
Combining analytical and simulation-based design space exploration for time-critical systems. FDL 2013: 1-8 - [c36]Seyed-Hosein Attarzadeh-Niaki, Marcus Mikulcak, Ingo Sander:
Rapid virtual prototyping of real-time systems using predictable platform characterizations. FDL 2013: 1-8 - [c35]Byron Navas, Johnny Öberg, Ingo Sander:
Towards the generic reconfigurable accelerator: Algorithm development, core design, and performance analysis. ReConFig 2013: 1-6 - 2012
- [j3]Jun Zhu, Ingo Sander, Axel Jantsch:
Performance Analysis of Reconfigurations in Adaptive Real-Time Streaming Applications. ACM Trans. Embed. Comput. Syst. 11(S1): 12 (2012) - [c34]Gilmar S. Beserra, Seyed-Hosein Attarzadeh-Niaki, Ingo Sander:
Integrating virtual platforms into a heterogeneous MoC-based modeling framework. FDL 2012: 143-150 - [c33]Seyed-Hosein Attarzadeh-Niaki, Mikkel Koefoed Jakobsen, Tero Sulonen, Ingo Sander:
Formal heterogeneous system modeling with SystemC. FDL 2012: 160-167 - [c32]Seyed-Hosein Attarzadeh-Niaki, Gilmar S. Beserra, Nikolaj Andersen, Mathias Verdon, Ingo Sander:
Heterogeneous system-level modeling for small and medium enterprises. SBCCI 2012: 1-6 - 2011
- [c31]Sandro Penolazzi, Ingo Sander, Ahmed Hemani:
Predicting bus contention effects on energy and performance in multi-processor SoCs. DATE 2011: 1196-1199 - [c30]Seyed-Hosein Attarzadeh-Niaki, Ingo Sander:
Semi-formal refinement of heterogeneous embedded systems by foreign model integration. FDL 2011: 1-8 - [c29]Seyed-Hosein Attarzadeh-Niaki, Ingo Sander:
Co-simulation of embedded systems in a heterogeneous MoC-based modeling framework. SIES 2011: 238-247 - 2010
- [c28]Jun Zhu, Ingo Sander, Axel Jantsch:
Constrained global scheduling of streaming applications on MPSoCs. ASP-DAC 2010: 223-228 - [c27]Sandro Penolazzi, Ingo Sander, Ahmed Hemani:
Predicting energy and performance overhead of Real-Time Operating Systems. DATE 2010: 15-20 - [c26]Jun Zhu, Ingo Sander, Axel Jantsch:
Pareto efficient design for reconfigurable streaming applications on CPU/FPGAs. DATE 2010: 1035-1040 - [c25]Jun Zhu, Ingo Sander, Axel Jantsch:
HetMoC: Heterogeneous Modelling in SystemC. FDL 2010: 117-122 - [c24]Sandro Penolazzi, Ingo Sander, Ahmed Hemani:
Inferring Energy and Performance Cost of RTOS in Priority-Driven Scheduling. SIES 2010: 1-8
2000 – 2009
- 2009
- [c23]Jun Zhu, Ingo Sander, Axel Jantsch:
Buffer minimization of real-time streaming applications scheduling on hybrid CPU/FPGA architectures. DATE 2009: 1506-1511 - [c22]Ingo Sander, Jun Zhu, Axel Jantsch, Andreas Herrholz, Philipp A. Hartmann, Wolfgang Nebel:
High-level estimation and trade-off analysis for adaptive real-time systems. IPDPS 2009: 1-4 - 2008
- [j2]Tarvo Raudvere, Ingo Sander, Axel Jantsch:
Application and Verification of Local Nonsemantic-Preserving Transformations in System Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(6): 1091-1103 (2008) - [c21]Jun Zhu, Ingo Sander, Axel Jantsch:
Energy efficient streaming applications with guaranteed throughput on MPSoCs. EMSOFT 2008: 119-128 - [c20]Jun Zhu, Ingo Sander, Axel Jantsch:
Performance analysis of reconfiguration in adaptive real-time streaming applications. ESTIMedia 2008: 53-58 - 2007
- [c19]Tarvo Raudvere, Ingo Sander, Axel Jantsch:
Synchronization after design refinements with sensitive delay elements. CODES+ISSS 2007: 21-26 - [c18]Andreas Herrholz, Frank Oppenheimer, Philipp A. Hartmann, Andreas Schallenberg, Wolfgang Nebel, Christoph Grimm, Markus Damm, Jan Haase, Florian Brame, Fernando Herrera, Eugenio Villar, Ingo Sander, Axel Jantsch, Anne-Marie Fouilliart, Marcos Martínez:
The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems. FPL 2007: 396-401 - [c17]Tarvo Raudvere, Ingo Sander, Axel Jantsch:
A synchronization algorithm for local temporal refinements in perfectly synchronous models with nested feedback loops. ACM Great Lakes Symposium on VLSI 2007: 353-358 - [c16]Zhonghai Lu, Jonas Sicking, Ingo Sander, Axel Jantsch:
Using Synchronizers for Refining Synchronous Communication onto Hardware/Software Architectures. IEEE International Workshop on Rapid System Prototyping 2007: 143-149 - [c15]Ingo Sander, Axel Jantsch:
Modelling Adaptive Systems in ForSyDe. VerAS@TPHOLs 2007: 39-54 - 2006
- [c14]Zhonghai Lu, Ingo Sander, Axel Jantsch:
Towards Performance-Oriented Pattern-Based Refinement of Synchronous Models onto NoC Communication. DSD 2006: 37-44 - [c13]Rikard Thid, Ingo Sander, Axel Jantsch:
Flexible Bus and NoC Performance Analysis with Configurable Synthetic Workloads. DSD 2006: 681-688 - 2005
- [c12]Zhonghai Lu, Axel Jantsch, Ingo Sander:
Feasibility analysis of messages for on-chip networks using wormhole routing. ASP-DAC 2005: 960-964 - [c11]Zhonghai Lu, Ingo Sander, Axel Jantsch:
Refinement of Perfectly Synchronous Communication Model. FDL 2005: 453-465 - [c10]Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, Axel Jantsch:
System level verification of digital signal processing applications based on the polynomial abstraction technique. ICCAD 2005: 285-290 - 2004
- [j1]Ingo Sander, Axel Jantsch:
System modeling and transformational design refinement in ForSyDe [formal system design]. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(1): 17-32 (2004) - [c9]Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, Axel Jantsch:
Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits. DATE 2004: 690-691 - 2003
- [b1]Ingo Sander:
System Modeling and Design Refinement in ForSyDe. Royal Institute of Technology, Stockholm, Sweden, 2003 - [c8]Tarvo Raudvere, Ingo Sander, Ashish Kumar Singh, Axel Jantsch:
Verification of design decisions in ForSyDe. CODES+ISSS 2003: 176-181 - [c7]Ingo Sander, Axel Jantsch, Zhonghai Lu:
Development and Application of Design Transformations in ForSyDe. DATE 2003: 10364-10369 - 2002
- [c6]Ingo Sander, Axel Jantsch:
Transformation based communication and clock domain refinement for system design. DAC 2002: 281-286 - [c5]Ingo Sander, Axel Jantsch, Zhonghai Lu:
A Case Study of Hardware and Software Synthesis in ForSyDe. ISSS 2002: 86-91 - 2001
- [c4]Axel Jantsch, Ingo Sander, Wenbiao Wu:
The usage of stochastic processes in embedded system specifications. CODES 2001: 5-10 - 2000
- [c3]Axel Jantsch, Ingo Sander:
On the roles of functions and objects in system specification. CODES 2000: 8-12
1990 – 1999
- 1999
- [c2]Ingo Sander, Axel Jantsch:
System synthesis utilizing a layered functional model. CODES 1999: 136-140 - [c1]Ingo Sander, Axel Jantsch:
Formal System Design Based on the Synchrony Hypothesis, Functional Models and Skeletons. VLSI Design 1999: 318-323
Coauthor Index
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