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Yuichiro Takei

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2010 – 2019

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2012
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  - conf/embc/TakeiKTIH12
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Yuichiro Takei, Hiroki Katsuta, Kenichi Takizawa, Tetsushi Ikegami, Kiyoshi Hamaguchi:
Prototype ultra wideband-based wireless body area network-consideration of CAP and CFP slot allocation during human walking motion-. EMBC 2012: 2484-2488

1990 – 1999

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1999
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Kenji Kawai, Keiichi Koike, Yuichiro Takei, Akira Onozawa, Hitoshi Obara, Haruhiko Ichino:
A 557-mW, 2.5-Gbit/s SONET/SDH regenerator-section terminating LSI chip using low-power bipolar-LSI design. IEEE J. Solid State Circuits 34(1): 12-17 (1999)
1998
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Keiichi Koike, Kenji Kawai, Akira Onozawa, Yuichiro Takei, Yoshiji Kobayashi, Haruhiko Ichino:
High-speed, low-power, bipolar standard cell design methodology for Gbit/s signal processing. IEEE J. Solid State Circuits 33(10): 1536-1544 (1998)
1997
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Yuichiro Takei, Akira Onozawa, Kenji Kawai, Hitoshi Kitazawa:
An Efficient Paired-net Routing Algorithm for High-speed Bipolar LSIs. Great Lakes Symposium on VLSI 1997: 2-7

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