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2020 – today
- 2023
[c13]Wenqi Jiang
, Shigang Li, Yu Zhu, Johannes de Fine Licht, Zhenhao He, Runbin Shi, Cédric Renggli, Shuai Zhang, Theodoros Rekatsinas, Torsten Hoefler, Gustavo Alonso:
Co-design Hardware and Algorithm for Vector Search. SC 2023: 87:1-87:15- [i6]Wenqi Jiang, Shigang Li, Yu Zhu, Johannes de Fine Licht, Zhenhao He, Runbin Shi, Cédric Renggli, Shuai Zhang, Theodoros Rekatsinas, Torsten Hoefler, Gustavo Alonso:
Co-design Hardware and Algorithm for Vector Search. CoRR abs/2306.11182 (2023) - 2022
- [j6]Tong Jian, Yifan Gong, Zheng Zhan, Runbin Shi, Nasim Soltani, Zifeng Wang, Jennifer G. Dy, Kaushik R. Chowdhury, Yanzhi Wang, Stratis Ioannidis:
Radio Frequency Fingerprinting on the Edge. IEEE Trans. Mob. Comput. 21(11): 4078-4093 (2022) - [j5]Runbin Shi, Kaan Kara, Christoph Hagleitner, Dionysios Diamantopoulos, Dimitris Syrivelis, Gustavo Alonso:
Exploiting HBM on FPGAs for Data Processing. ACM Trans. Reconfigurable Technol. Syst. 15(4): 36:1-36:27 (2022) - [i5]Abishek Ramdas, Michael Giardino, Runbin Shi, Adam Turowski, David A. Cock, Gustavo Alonso, Timothy Roscoe:
ECI: a Customizable Cache Coherency Stack for Hybrid FPGA-CPU Architectures. CoRR abs/2208.07124 (2022) - 2021
- [j4]He Li, Ameer Abdelhadi, Runbin Shi, Jiliang Zhang, Qiang Liu:
Adversarial Hardware With Functional and Topological Camouflage. IEEE Trans. Circuits Syst. II Express Briefs 68(5): 1685-1689 (2021) - [j3]Tong Geng, Ang Li, Tianqi Wang, Chunshu Wu, Yanfei Li, Runbin Shi, Wei Wu, Martin C. Herbordt:
O3BNN-R: An Out-of-Order Architecture for High-Performance and Regularized BNN Inference. IEEE Trans. Parallel Distributed Syst. 32(1): 199-213 (2021) - [c12]Sung-En Chang, Yanyu Li, Mengshu Sun, Runbin Shi, Hayden K. H. So, Xuehai Qian, Yanzhi Wang, Xue Lin:
Mix and Match: A Novel FPGA-Centric Deep Neural Network Quantization Framework. HPCA 2021: 208-220 - 2020
- [c11]Runbin Shi, Yuhao Ding, Xuechao Wei, He Li, Hang Liu, Hayden Kwok-Hay So, Caiwen Ding:
FTDL: A Tailored FPGA-Overlay for Deep Learning with High Scalability. DAC 2020: 1-6 - [c10]Runbin Shi, Yuhao Ding, Xuechao Wei, Hang Liu, Hayden Kwok-Hay So, Caiwen Ding:
FTDL: An FPGA-tailored Architecture for Deep Learning Systems. FPGA 2020: 320 - [c9]Junjie Liu, Zhe Xu, Runbin Shi, Ray C. C. Cheung, Hayden Kwok-Hay So:
Dynamic Sparse Training: Find Efficient Sparse Network From Scratch With Trainable Masked Layers. ICLR 2020 - [c8]Runbin Shi, Peiyan Dong, Tong Geng, Yuhao Ding, Xiaolong Ma, Hayden Kwok-Hay So, Martin C. Herbordt, Ang Li, Yanzhi Wang:
CSB-RNN: a faster-than-realtime RNN acceleration framework with compressed structured blocks. ICS 2020: 24:1-24:12 - [c7]Tong Geng, Ang Li, Runbin Shi, Chunshu Wu, Tianqi Wang, Yanfei Li, Pouya Haghi, Antonino Tumeo, Shuai Che, Steven K. Reinhardt, Martin C. Herbordt:
AWB-GCN: A Graph Convolutional Network Accelerator with Runtime Workload Rebalancing. MICRO 2020: 922-936 - [i4]Runbin Shi, Peiyan Dong, Tong Geng, Yuhao Ding, Xiaolong Ma, Hayden Kwok-Hay So, Martin C. Herbordt, Ang Li, Yanzhi Wang:
CSB-RNN: A Faster-than-Realtime RNN Acceleration Framework with Compressed Structured Blocks. CoRR abs/2005.05758 (2020) - [i3]Junjie Liu, Zhe Xu, Runbin Shi, Ray C. C. Cheung, Hayden Kwok-Hay So:
Dynamic Sparse Training: Find Efficient Sparse Network From Scratch With Trainable Masked Layers. CoRR abs/2005.06870 (2020) - [i2]Sung-En Chang, Yanyu Li, Mengshu Sun, Weiwen Jiang, Runbin Shi, Xue Lin, Yanzhi Wang:
MSP: An FPGA-Specific Mixed-Scheme, Multi-Precision Deep Neural Network Quantization Framework. CoRR abs/2009.07460 (2020) - [i1]Sung-En Chang, Yanyu Li, Mengshu Sun, Runbin Shi, Hayden Kwok-Hay So, Xuehai Qian, Yanzhi Wang, Xue Lin:
Mix and Match: A Novel FPGA-Centric Deep Neural Network Quantization Framework. CoRR abs/2012.04240 (2020)
2010 – 2019
- 2019
- [j2]Runbin Shi, Justin S. J. Wong, Hayden Kwok-Hay So:
High-Throughput Line Buffer Microarchitecture for Arbitrary Sized Streaming Image Processing. J. Imaging 5(3): 34 (2019) - [j1]Runbin Shi, Justin S. J. Wong, Edmund Y. Lam, Kevin K. Tsia, Hayden Kwok-Hay So:
A Real-Time Coprime Line Scan Super-Resolution System for Ultra-Fast Microscopy. IEEE Trans. Biomed. Circuits Syst. 13(4): 781-792 (2019) - [c6]Runbin Shi, Junjie Liu, Hayden Kwok-Hay So, Shuo Wang, Yun Liang:
E-LSTM: Efficient Inference of Sparse LSTM on Embedded Heterogeneous System. DAC 2019: 182 - 2017
- [c5]Justin S. J. Wong, Runbin Shi, Maolin Wang, Hayden Kwok-Hay So:
Ultra-low latency continuous block-parallel stream windowing using FPGA on-chip memory. FPT 2017: 56-63 - 2016
- [c4]Maurice Peemen, Runbin Shi, Sohan Lal, Ben H. H. Juurlink, Bart Mesman, Henk Corporaal:
The neuro vector engine: Flexibility to improve convolutional net efficiency for wearable vision. DATE 2016: 1604-1609 - [c3]Zheng Xu, Runbin Shi, Zhihao Sun, Yaqi Li, Yuanjia Zhao, Chenjian Wu:
A Heterogeneous System for Real-Time Detection with AdaBoost. HPCC/SmartCity/DSS 2016: 839-843 - 2015
- [c2]Xiaoying Qiu, Leilei Miao, Runbin Shi, Zhiwei Wang, Liang Liu, Di Wu:
A programmable baseband processor for massive MIMO uplink multi-user detection. ASICON 2015: 1-4 - [c1]Runbin Shi, Zheng Xu, Zhihao Sun, Maurice Peemen, Ang Li, Henk Corporaal, Di Wu:
A Locality Aware Convolutional Neural Networks Accelerator. DSD 2015: 591-598
Coauthor Index
aka: Hayden K. H. So
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