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ORCIDKostas Adaos
Person information
- affiliation: University of Patras, Greece
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Journal Articles
- 2006
[j2]Dimitris Bakalis, Kostas Adaos, Dimitrios Lymperopoulos, Maciej Bellos, Haridimos T. Vergos, George Alexiou, Dimitris Nikolos:
A core generator for arithmetic cores and testing structures with a network interface. J. Syst. Archit. 52(1): 1-12 (2006)- 1995
- [j1]Theodore Karoubalis, Kostas Adaos, George Alexiou, Nick Kanopoulos:
A new efficient dcvs circuit synthesis technique used for an improved implementation of a serial/parallel multiplier. Int. J. Circuit Theory Appl. 23(6): 587-598 (1995)
Conference and Workshop Papers
- 2014
- [c9]K. Poulos, Kostas Adaos, George Alexiou:
Automated Generation of the Register Set of a SOC and its Verification Environment. Panhellenic Conference on Informatics 2014: 35:1-35:2 - 2011
- [c8]Nikos Kanistras, Ioannis Tsatsaragkos, Ahmed Mahdi, Konstantina Karagianni, Vassilis Paliouras
, Fotios Gioulekas, E. Lalos, Kostas Adaos, Michael K. Birbas, Panos Karaivazoglou, M. V. Koziotis, M. Perakis:
Digital baseband challenges for a 60GHz gigabit link. ICECS 2011: 346-349 - 2008
- [c7]V. Mariatos, Kostas Adaos, George Alexiou:
A Novel System-on-Chip Architecture for Efficient Image Processing. IEEE International Workshop on Rapid System Prototyping 2008: 165-171 - 2007
- [c6]V. Mariatos, Kostas Adaos, George Alexiou:
Design and Implementation of a Reconfigurable, Embedded Real-Time Face Detection System. IEEE International Workshop on Rapid System Prototyping 2007: 65-68 - 2001
- [c5]Dimitris Bakalis, Kostas Adaos, George Alexiou, Dimitris Nikolos, Dimitrios Lymperopoulos:
EUDOXUS: A WWW-based Generator of Reusable Arithmetic Cores. IEEE International Workshop on Rapid System Prototyping 2001: 182-187 - 2000
- [c4]Kostas Adaos, George Alexiou, Nick Kanopoulos:
Development of reusable serial FIR filters with reprogrammable coefficients designed for serial dataflow architectures. ICECS 2000: 567-570 - 1999
- [c3]Kostas Adaos, G. Ph. Alexiou, Nikos Kanopoulos:
Efficient implementation of a serial/parallel multiplier for IP based development and rapid prototyping in VLSI digital signal processing. ICECS 1999: 33-36 - [c2]A. Vasilliou, K. Gounaris, Kostas Adaos, D. Mitsainas, George Alexiou, Dimitris Nikolos:
Development of a Reusable E1 Transceiver Suitable for Rapid Prototyping. IEEE International Workshop on Rapid System Prototyping 1999: 21- - 1998
- [c1]Kostas Adaos, George Alexiou, Nick Kanopoulos:
An Extensible, Low Cost Rapid Prototyping Environment Based on a Reconfigurable Set of FPGAs. International Workshop on Rapid System Prototyping 1998: 78-83
Coauthor Index
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