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Seyong Ahn

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2010 – 2019

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2019
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Kyeongrok Jo, Seyong Ahn, Jungho Do, Taejoong Song, Taewhan Kim, Kyu-Myung Choi:
Design Rule Evaluation Framework Using Automatic Cell Layout Generator for Design Technology Co-Optimization. IEEE Trans. Very Large Scale Integr. Syst. 27(8): 1933-1946 (2019)
2018
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Kyeongrok Jo, Seyong Ahn, Taewhan Kim, Kyu-Myung Choi:
Cohesive techniques for cell layout optimization supporting 2D metal-1 routing completion. ASP-DAC 2018: 500-506
2016
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Seyong Ahn, Minseok Kang, Marios C. Papaefthymiou, Taewhan Kim:
Design Methodology for Synthesizing Resonant Clock Networks in the Presence of Dynamic Voltage/Frequency Scaling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(12): 2068-2081 (2016)
2015
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Seyong Ahn, Minseok Kang, Marios C. Papaefthymiou, Taewhan Kim:
Synthesis of resonant clock networks supporting dynamic voltage / frequency scaling. ASP-DAC 2015: 484-489

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