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Books and Theses
- 2012
[b1]Ben H. H. Juurlink, Mauricio Alvarez-Mesa, Chi Ching Chi, Arnaldo Azevedo, Cor Meenderinck, Alex Ramírez:
Scalable Parallel Programming Applied to H.264/AVC Decoding. Springer Briefs in Computer Science, Springer 2012, ISBN 978-1-4614-2229-7, pp. i-xiii, 1-101
Journal Articles
- 2013
- [j8]Bruno Zatt, Leandro M. de L. Silva, Arnaldo Azevedo, Luciano Volcan Agostini
, Altamiro Amadeu Susin, Sergio Bampi:
A reduced memory bandwidth and high throughput HDTV motion compensation decoder for H.264/AVC High 4: 2: 2 profile. J. Real Time Image Process. 8(1): 127-140 (2013) - [j7]Kees Goossens, Arnaldo Azevedo, Karthik Chandrasekar, Manil Dev Gomony, Sven Goossens, Martijn Koedam, Yonghui Li, Davit Mirzoyan, Anca Mariana Molnos, Ashkan Beyranvand Nejad, Andrew Nelson, Shubhendu Sinha:
Virtual execution platforms for mixed-time-criticality systems: the CompSOC architecture and design flow. SIGBED Rev. 10(3): 23-34 (2013) - 2011
- [j6]Arnaldo Azevedo, Ben H. H. Juurlink, Cor Meenderinck, Andrei Sergeevich Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez, Mateo Valero:
A Highly Scalable Parallel Implementation of H.264. Trans. High Perform. Embed. Archit. Compil. 4: 111-134 (2011) - 2010
- [j5]Arnaldo Azevedo, Ben H. H. Juurlink:
A Multidimensional Software Cache for Scratchpad-Based Systems. Int. J. Embed. Real Time Commun. Syst. 1(4): 1-20 (2010) - [j4]Alex Ramírez, Felipe Cabarcas, Ben H. H. Juurlink, Mauricio Alvarez-Mesa, Friman Sánchez, Arnaldo Azevedo, Cor Meenderinck, Catalin Bogdan Ciobanu, Sebastián Isaza, Georgi Gaydadjiev:
The SARC Architecture. IEEE Micro 30(5): 16-29 (2010) - 2009
- [j3]Mauricio Alvarez, Alex Ramírez, Mateo Valero, Arnaldo Azevedo, Cor Meenderinck:
Evaluación del rendimiento paralelo en el nivel macro bloque del decodificador H.264 en una arquitectura multiprocesador cc-NUMA. Rev. Avances en Sistemas Informática 6(1): 219-228 (2009) - [j2]Cor Meenderinck, Arnaldo Azevedo, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez:
Parallel Scalability of Video Decoders. J. Signal Process. Syst. 57(2): 173-194 (2009) - 2007
- [j1]Luciano Volcan Agostini, Arnaldo P. Azevedo Filho, Wagston T. Staehler, Vagner S. Rosa, Bruno Zatt, Ana Cristina Medina Pinto, Roger Endrigo Carvalho Porto, Sergio Bampi, Altamiro Amadeu Susin:
Design and FPGA Prototyping of a H.264/AVC Main Profile. J. Braz. Comput. Soc. 13(1): 25-36 (2007)
Conference and Workshop Papers
- 2012
- [c18]Arnaldo Azevedo, Bart Vermeulen, Kees Goossens:
Architecture and design flow for a debug event distribution interconnect. ICCD 2012: 439-444 - 2011
- [c17]Arnaldo Azevedo, Ben H. H. Juurlink:
An Instruction to Accelerate Software Caches. ARCS 2011: 158-170 - 2009
- [c16]Arnaldo P. Azevedo Filho, Ben H. H. Juurlink:
Scalar Processing Overhead on SIMD-Only Architectures. ASAP 2009: 183-190 - [c15]Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Andrei Sergeevich Terechko, Jan Hoogerbrugge, Mauricio Alvarez, Alex Ramírez:
Parallel H.264 Decoding on an Embedded Multicore Processor. HiPEAC 2009: 404-418 - [c14]Mauricio Alvarez-Mesa, Alex Ramírez, Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mateo Valero:
Scalability of Macroblock-level Parallelism for H.264 Decoding. ICPADS 2009: 236-243 - [c13]Arnaldo Azevedo, Ben H. H. Juurlink:
An efficient software cache for H.264 motion compensation. SoC 2009: 147-150 - 2008
- [c12]Roberto Giorgi, Zdravko Popovic, Nikola Puzovic, Arnaldo Azevedo, Ben H. H. Juurlink:
Analyzing Scalability of Deblocking Filter of H.264 via TLP Exploitation in a New Many-Core Architecture. DSD 2008: 189-194 - [c11]Arnaldo Azevedo, Cor Meenderinck, Ben H. H. Juurlink, Mauricio Alvarez, Alex Ramírez:
Analysis of video filtering on the cell processor. ISCAS 2008: 488-491 - 2007
- [c10]Arnaldo Azevedo, Bruno Zatt, Luciano Volcan Agostini, Sergio Bampi:
MoCHA: a Bi-Predictive Motion Compensation Hardware for H.264/AVC Decoder Targeting HDTV. ISCAS 2007: 1617-1620 - [c9]Bruno Zatt, Arnaldo Azevedo, Luciano Volcan Agostini, Altamiro Amadeu Susin, Sergio Bampi:
Memory Hierarchy Targeting Bi-Predictive Motion Compensation for H.264/AVC Decoder. ISVLSI 2007: 445-446 - [c8]Vagner S. Rosa, Wagston T. Staehler, Arnaldo Azevedo, Bruno Zatt, Roger Endrigo Carvalho Porto, Luciano Volcan Agostini, Sergio Bampi, Altamiro Amadeu Susin:
FPGA Prototyping Strategy for a H.264/AVC Video Decoder. IEEE International Workshop on Rapid System Prototyping 2007: 174-180 - 2006
- [c7]Luciano Volcan Agostini, Arnaldo Azevedo, Vagner S. Rosa, Eduardo A. Berriel, Tatiana Gadelha Serra dos Santos, Sergio Bampi, Altamiro Amadeu Susin:
FPGA Design of A H.264/AVC Main Profile Decoder for HDTV. FPL 2006: 1-6 - [c6]Arnaldo Azevedo, Bruno Zatt, Luciano Volcan Agostini, Sergio Bampi:
Motion Compensation Decoder Architecture for H.264/AVC Main Profile Targeting HDTV. VLSI-SoC 2006: 52-57 - 2005
- [c5]Arnaldo Azevedo, Luciano Volcan Agostini, Flávio Rech Wagner, Sergio Bampi:
Accelerating a Multiprocessor Reconfigurable Architecture with Pipelined VLIW Units. IEEE International Workshop on Rapid System Prototyping 2005: 255-257 - 2004
- [c4]Rodrigo Soares, Ivan Saraiva Silva, Arnaldo Azevedo:
When reconfigurable architecture meets network-on-chip. SBCCI 2004: 216-221 - 2003
- [c3]Rodrigo Soares, Arnaldo Azevedo, Ivan Saraiva Silva:
X4CP32: A Coarse Grain General Purpose Reconfigurable Microprocessor. IPDPS 2003: 171 - [c2]Rodrigo Soares, Arnaldo Azevedo, Ivan Saraiva Silva:
X4CP32: A New Parallel/Reconfigurable General-Purpose Processor. SBAC-PAD 2003: 260-268 - [c1]Arnaldo Azevedo, Rodrigo Soares, Ivan Saraiva Silva:
A New Hybrid Parallel/Reconfigurable Architecture: The X4CP32. SBCCI 2003: 225-230
Coauthor Index
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