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2020 – today
- 2023
[j3]Chunrong Zhou, Zhenghong Jiang:
Load balancing in virtual machines of cloud environments using two-level particle swarm optimization algorithm. J. Intell. Fuzzy Syst. 45(6): 9433-9444 (2023)- [j2]Wanwan Wang, Yu Duan
, Longhan Cao, Zhenghong Jiang:
Application of improved Naive Bayes classification algorithm in 5G signaling analysis. J. Supercomput. 79(6): 6941-6964 (2023) - 2021
- [c6]Yang Li, Wanbiao Lin, Tianjun Zha, Zhenghong Jiang, Peiwen Li, Lei Sun:
Efficient Loop Closure Detection Method for Lidar SLAM in Challenging Environment. CRC 2021: 196-199
2010 – 2019
- 2019
- [c5]Zhenghong Jiang, Hanchen Jin, G. Edward Suh, Zhiru Zhang:
Designing Secure Cryptographic Accelerators with Information Flow Enforcement: A Case Study on AES. DAC 2019: 59 - 2018
- [c4]Zhenghong Jiang, Steve Dai, G. Edward Suh, Zhiru Zhang:
High-level synthesis with timing-sensitive information flow enforcement. ICCAD 2018: 88 - 2017
- [c3]Zhihong Huang, Xing Wei, Grace Zgheib, Wei Li, Yu Lin, Zhenghong Jiang, Kaihui Tu, Paolo Ienne, Haigang Yang:
NAND-NOR: A Compact, Fast, and Delay Balanced FPGA Logic Element. FPGA 2017: 135-140 - 2016
- [j1]Colin Yu Lin, Zhenghong Jiang, Cheng Fu, Hayden Kwok-Hay So, Haigang Yang:
FPGA High-level Synthesis versus Overlay: Comparisons on Computation Kernels. SIGARCH Comput. Archit. News 44(4): 92-97 (2016) - 2015
- [c2]Zhenghong Jiang, Grace Zgheib, Colin Yu Lin, David Novo, Zhihong Huang, Liqun Yang, Haigang Yang, Paolo Ienne:
A technology mapper for depth-constrained FPGA logic cells. FPL 2015: 1-8 - 2014
- [c1]Zhenghong Jiang, Colin Yu Lin, Liqun Yang, Fei Wang, Haigang Yang:
Exploring architecture parameters for dual-output LUT based FPGAs. FPL 2014: 1-6
Coauthor Index
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