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ORCIDKavitha T. Madhu
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2020 – today
- 2021
[c8]Kavitha T. Madhu, Saptarsi Das, Abhishek Tyagi, Ankur Deshwal, Joonho Song, Seungwon Lee:
Transport Triggered near Memory Accelerator for Deep Learning. ISCAS 2021: 1-5- [c7]Aditi Saluja, Arnab Mitra, Ankur Deshwal, Kavitha T. Madhu, Ujjawal Chugh, Seungwon Lee, Joonho Song:
Autotuning LSTM for Accelerated Execution on Edge. ISCAS 2021: 1-5
2010 – 2019
- 2017
- [j2]Nalesh Sivanandan, Kavitha T. Madhu, Saptarsi Das, S. K. Nandy, Ranjani Narayan:
Energy aware synthesis of application kernels through composition of data-paths on a CGRA. Integr. 58: 320-328 (2017) - [c6]Kavitha T. Madhu, Tarun Singla, S. K. Nandy, Ranjani Narayan, François Neumann, Philippe Baufreton:
REDEFINE®™: a case for WCET-friendly hardware accelerators for real time applications (work-in-progress). CASES 2017: 15:1-15:2 - 2016
- [c5]Kavitha T. Madhu, Anuj Rao, Saptarsi Das, Krishna C. Madhava, S. K. Nandy, Ranjani Narayan:
Flexible resource allocation and management for application graphs on ReNÉ MPSoC. PARMA-DITAM@HiPEAC 2016: 13-18 - [c4]Saptarsi Das, Nalesh Sivanandan, Kavitha T. Madhu, Soumitra Kumar Nandy, Ranjani Narayan:
RHyMe: REDEFINE Hyper Cell Multicore for Accelerating HPC Kernels. VLSID 2016: 601-602 - 2015
- [c3]Kavitha T. Madhu, Saptarsi Das, Nalesh Sivanandan, S. K. Nandy, Ranjani Narayan:
Compiling HPC Kernels for the REDEFINE CGRA. HPCC/CSS/ICESS 2015: 405-410 - [c2]Nalesh Sivanandan, Kavitha T. Madhu, Saptarsi Das, S. K. Nandy, Ranjani Narayan:
Energy Aware Synthesis of Application Kernels Expressed in Functional Languages on a Coarse Grained Composable Reconfigurable Array. iNIS 2015: 7-12 - 2014
- [j1]Saptarsi Das, Kavitha T. Madhu, Madhav Krishna, Nalesh Sivanandan, Farhad Merchant
, Santhi Natarajan, Ipsita Biswas, Adithya Pulli, S. K. Nandy, Ranjani Narayan:
A framework for post-silicon realization of arbitrary instruction extensions on reconfigurable data-paths. J. Syst. Archit. 60(7): 592-614 (2014) - [c1]Kavitha T. Madhu, Saptarsi Das, Madhava Krishna C, Nalesh Sivanandan, S. K. Nandy, Ranjani Narayan:
Synthesis of Instruction Extensions on HyperCell, a reconfigurable datapath. ICSAMOS 2014: 215-224
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