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ORCIDBo-Yuan Huang 0001
Person information
- affiliation: Princeton University, Department of Electrical Engineering, NJ, USA
- affiliation (former): National Taiwan University, Taipei, Taiwan
Other persons with the same name
- Bo-Yuan Huang 0002 — National Chi Nan University, Department of Computer Science and Information Engineering, Nantou, Taiwan
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Journal Articles
- 2024
[j4]Bo-Yuan Huang
, Steven Lyubomirsky, Yi Li, Mike He, Gus Henry Smith, Thierry Tambe, Akash Gaonkar, Vishal Canumalla, Andrew Cheung, Gu-Yeon Wei, Aarti Gupta, Zachary Tatlock, Sharad Malik:
Application-level Validation of Accelerator Designs Using a Formal Software/Hardware Interface. ACM Trans. Design Autom. Electr. Syst. 29(2): 35:1-35:25 (2024)- 2019
- [j3]Bo-Yuan Huang, Hongce Zhang, Pramod Subramanyan, Yakir Vizel, Aarti Gupta, Sharad Malik:
Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification. ACM Trans. Design Autom. Electr. Syst. 24(1): 10:1-10:24 (2019) - 2018
- [j2]Pramod Subramanyan, Bo-Yuan Huang, Yakir Vizel, Aarti Gupta, Sharad Malik:
Template-Based Parameterized Synthesis of Uniform Instruction-Level Abstractions for SoC Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(8): 1692-1705 (2018) - 2017
- [j1]Shih-Tang Su, Bo-Yuan Huang, Chih-Yu Wang, Che-Wei Yeh, Hung-Yu Wei:
Protocol Design and Game Theoretic Solutions for Device-to-Device Radio Resource Allocation. IEEE Trans. Veh. Technol. 66(5): 4271-4286 (2017)
Conference and Workshop Papers
- 2023
- [c8]Bo-Yuan Huang, Hongce Zhang, Aarti Gupta, Sharad Malik:
INVITED: Generalizing the ISA to the ILA: A Software/Hardware Interface for Accelerator-rich Platforms. DAC 2023: 1-4 - 2021
- [c7]Yu Zeng, Bo-Yuan Huang, Hongce Zhang, Aarti Gupta, Sharad Malik:
Generating Architecture-Level Abstractions from RTL Designs for Processors and Accelerators Part I: Determining Architectural State Variables. ICCAD 2021: 1-9 - 2020
- [c6]Patrice Godefroid, Bo-Yuan Huang, Marina Polishchuk:
Intelligent REST API data fuzzing. ESEC/SIGSOFT FSE 2020: 725-736 - 2019
- [c5]Bo-Yuan Huang, Hongce Zhang, Aarti Gupta, Sharad Malik:
ILAng: A Modeling and Verification Platform for SoCs Using Instruction-Level Abstractions. TACAS (1) 2019: 351-357 - 2018
- [c4]Bo-Yuan Huang, Sayak Ray, Aarti Gupta, Jason M. Fung, Sharad Malik:
Formal security verification of concurrent firmware in SoCs using instruction-level abstraction for hardware. DAC 2018: 91:1-91:6 - [c3]Yue Xing, Bo-Yuan Huang, Aarti Gupta, Sharad Malik:
A formal instruction-level GPU model for scalable verification. ICCAD 2018: 130 - 2015
- [c2]Bo-Yuan Huang, Yi-Hsiang Lai, Jie-Hong Roland Jiang:
Asynchronous QDI Circuit Synthesis from Signal Transition Protocols. ICCAD 2015: 434-441 - 2014
- [c1]Bo-Yuan Huang, Shih-Tang Su, Chih-Yu Wang, Che-Wei Yeh, Hung-Yu Wei:
Resource allocation in D2D communication - A game theoretic approach. ICC Workshops 2014: 483-488
Informal and Other Publications
- 2022
- [i2]Bo-Yuan Huang, Steven Lyubomirsky, Yi Li, Mike He, Thierry Tambe, Gus Henry Smith, Akash Gaonkar, Vishal Canumalla, Gu-Yeon Wei, Aarti Gupta, Zachary Tatlock, Sharad Malik:
Specialized Accelerators and Compiler Flows: Replacing Accelerator APIs with a Formal Software/Hardware Interface. CoRR abs/2203.00218 (2022) - 2018
- [i1]Bo-Yuan Huang, Hongce Zhang, Pramod Subramanyan, Yakir Vizel, Aarti Gupta, Sharad Malik:
Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification. CoRR abs/1801.01114 (2018)
Coauthor Index
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