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2010 – 2019
- 2011
[c13]Farid Lahrach, Abderrahim Doumar, Eric Châtelet:
Fault tolerance of SRAM-based FPGA via configuration frames. DDECS 2011: 139-142- [c12]Farid Lahrach, Abderrahim Doumar, Eric Châtelet:
Fault Tolerance of Multiple Logic Faults in SRAM-Based FPGA Systems. DSD 2011: 231-238 - [c11]Abderrazak Abdaoui, K. Gurram, M. Singh, A. Errandani, Eric Châtelet, Abderrahim Doumar, Tarek M. El-Fouly
:
Video acquisition between USB 2.0 CMOS camera and embedded FPGA system. ICSPCS 2011: 1-5 - 2010
- [c10]Farid Lahrach, Abderrazek Abdaoui, Abderrahim Doumar, Eric Châtelet:
A novel SRAM-based FPGA architecture for defect and fault tolerance of configurable logic blocks. DDECS 2010: 305-308 - [c9]Farid Lahrach, Abderrahim Doumar, Eric Châtelet, Abderrazek Abdaoui:
Master-Slave TMR Inspired Technique for Fault Tolerance of SRAM-Based FPGA. ISVLSI 2010: 58-62
2000 – 2009
- 2007
- [c8]Abderrahim Doumar, Kentaroh Katoh, Hideo Ito:
Fault Tolerant SoC Architecture Design for JPEG2000 Using Partial Reconfigurability. DFT 2007: 31-40 - 2005
- [c7]Kentaroh Katoh, Abderrahim Doumar, Hideo Ito:
Design of On-Line Testing for SoC with IEEE P1500 Compliant Cores Using Reconfigurable Hardware and Scan Shift. IOLTS 2005: 203-204 - 2003
- [j1]Abderrahim Doumar, Hideo Ito:
Detecting, diagnosing, and tolerating faults in SRAM-based field programmable gate arrays: a survey. IEEE Trans. Very Large Scale Integr. Syst. 11(3): 386-405 (2003) - 2000
- [c6]Abderrahim Doumar, Hideo Ito:
Testing approach within FPGA-based fault tolerant systems. Asian Test Symposium 2000: 411-416 - [c5]Abderrahim Doumar, Hideo Ito:
Design of Switching Blocks Tolerating Defects/Faults in FPGA Interconnection Resources. DFT 2000: 134-142
1990 – 1999
- 1999
- [c4]Abderrahim Doumar, Hideo Ito:
Testing the Logic Cells and Interconnect Resources for FPGAs. Asian Test Symposium 1999: 369-374 - [c3]Abderrahim Doumar, Satoshi Kaneko, Hideo Ito:
Defect and Fault Tolerance FPGAs by Shifting the Configuration Data. DFT 1999: 377-385 - [c2]Abderrahim Doumar, Toshiaki Ohmameuda, Hideo Ito:
Design of an automatic testing for FPGAs. ETW 1999: 152-157 - [c1]Abderrahim Doumar, Hideo Ito:
An Automatic Testing and Diagnosis for FPGAs. PRDC 1999: 45-
Coauthor Index
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