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Dimitrios Stathis 0001
Person information
- affiliation: KTH Royal Institute of Technology, Stockholm, Sweden
- affiliation: Democritus University of Thrace, Xanthi, Greece
Other persons with the same name
- Dimitrios Stathis 0002 — Aristotle University of Thessaloniki, Greece
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2020 – today
- 2024
- [j8]Pudi Dhilleswararao, Yu Yang, Dimitrios Stathis, Sunil Kumar Prajapati, Srinivas Boppu, Ahmed Hemani, Linga Reddy Cenkeramaddi:
Application Level Synthesis: Creating Matrix-Matrix Multiplication Library: A Case Study. IEEE Access 12: 155885-155903 (2024) - [j7]Jiawei Xu, Yi Zheng, Feng Li, Dimitrios Stathis, Ruisi Shen, Haoming Chu, Anders Lansner, Lirong Zheng, Zhuo Zou, Ahmed Hemani:
Modeling Cycle-to-Cycle Variation in Memristors for In-Situ Unsupervised Trace-STDP Learning. IEEE Trans. Circuits Syst. II Express Briefs 71(2): 627-631 (2024) - [c20]Deyu Wang, Yuning Wang, Yu Yang, Dimitrios Stathis, Ahmed Hemani, Anders Lansner, Jiawei Xu, Li-Rong Zheng, Zhuo Zou:
FPGA-Based HPC for Associative Memory System. ASPDAC 2024: 52-57 - 2023
- [j6]Dimitrios Stathis, Panagiotis Chaourani, Syed M. A. H. Jafri, Ahmed Hemani:
Clock tree generation by abutment in synchoros VLSI design. Microprocess. Microsystems 102: 104913 (2023) - [j5]Deyu Wang, Jiawei Xu, Feng Li, Lianhao Zhang, Chengwei Cao, Dimitrios Stathis, Anders Lansner, Ahmed Hemani, Lirong Zheng, Zhuo Zou:
A Memristor-Based Learning Engine for Synaptic Trace-Based Online Learning. IEEE Trans. Biomed. Circuits Syst. 17(5): 1153-1165 (2023) - [c19]Seyed Ahmad Mirsalari, Saba Yousefzadeh, Giuseppe Tagliavini, Dimitrios Stathis, Ahmed Hemani:
Optimizing Self-Organizing Maps for Bacterial Genome Identification on Parallel Ultra-Low-Power Platforms. ICECS 2023: 1-8 - [c18]Jiawei Xu, Yi Zheng, Chenxu Sheng, Yichen Cai, Dimitrios Stathis, Ruisi Shen, Lirong Zheng, Zhuo Zou, Laigui Hu, Ahmed Hemani:
Optoelectronic Memristor Model for Optical Synaptic Circuit of Spiking Neural Networks. NEWCAS 2023: 1-5 - [c17]Reeshita Kallapu, Dimitrios Stathis, Srinivas Boppu, Ahmed Hemani:
DRRA-based Reconfigurable Architecture for Mixed-Radix FFT. VLSID 2023: 25-30 - 2022
- [j4]Nesma M. Rezk, Tomas Nordström, Dimitrios Stathis, Zain Ul-Abdin, Eren Erdal Aksoy, Ahmed Hemani:
MOHAQ: Multi-Objective Hardware-Aware Quantization of recurrent neural networks. J. Syst. Archit. 133: 102778 (2022) - [c16]Yu Yang, Dimitrios Stathis, Ahmed Hemani:
Reducing the Configuration Overhead of the Distributed Two-level Control System. DATE 2022: 104-107 - 2021
- [c15]Jiawei Xu, Deyu Wang, Feng Li, Lianhao Zhang, Dimitrios Stathis, Yu Yang, Yi Jin, Anders Lansner, Ahmed Hemani, Zhuo Zou, Li-Rong Zheng:
A Memristor Model with Concise Window Function for Spiking Brain-Inspired Computation. AICAS 2021: 1-4 - [c14]Dimitrios Stathis, Yu Yang, Ahmed Hemani, Anders Lansner:
Approximate computation of post-synaptic spikes reduces bandwidth to synaptic storage in a model of cortex. DATE 2021: 685-688 - [c13]Jordi Altayó González, Dimitrios Stathis, Ahmed Hemani:
Synthesis of predictable global NoC by abutment in synchoros VLSI design. NOCS 2021: 61-66 - [c12]Dimitrios Stathis, Panagiotis Chaourani, Syed M. A. H. Jafri, Ahmed Hemani:
Clock Tree Generation by Abutment in Synchoros VLSI Design. NorCAS 2021: 1-7 - [c11]Ayazulla Khan Patan, Dimitrios Stathis, Pudi Dhilleswararao, Yu Yang, Srinivas Boppu, Ahmed Hemani:
Design and Implementation of Optimized Register File for Streaming Applications. VDAT 2021: 1-4 - [i4]Nesma M. Rezk, Tomas Nordström, Dimitrios Stathis, Zain Ul-Abdin, Eren Erdal Aksoy, Ahmed Hemani:
Multi-objective Recurrent Neural Networks Optimization for the Edge - a Quantization-based Approach. CoRR abs/2108.01192 (2021) - [i3]Jordi Altayó González, Dimitrios Stathis, Ahmed Hemani:
Synthesis of Predictable Global NoC by Abutment in Synchoros VLSI Design. CoRR abs/2108.12213 (2021) - 2020
- [j3]Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn:
eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex. J. Signal Process. Syst. 92(11): 1323-1343 (2020) - [c10]Guido Baccelli, Dimitrios Stathis, Ahmed Hemani, Maurizio Martina:
NACU: A Non-Linear Arithmetic Unit for Neural Networks. DAC 2020: 1-6
2010 – 2019
- 2019
- [c9]Dimitrios Stathis, Yu Yang, Saurabh Tewari, Ahmed Hemani, Kolin Paul, Manfred G. Grabherr, Rafi Ahmad:
Approximate Computing Applied to Bacterial Genome Identification using Self-Organizing Maps. ISVLSI 2019: 560-567 - [i2]Dimitrios Stathis, Panagiotis Chaourani, Syed M. A. H. Jafri, Ahmed Hemani:
Regional Clock Tree Generation by Abutment in Synchoros VLSI Design. CoRR abs/1910.11253 (2019) - [i1]Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Syed Mohammad Asad Hassan Jafri, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn:
eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex. CoRR abs/1911.00889 (2019) - 2018
- [j2]Ioannis Vourkas, Dimitrios Stathis, Georgios Ch. Sirakoulis:
Massively Parallel Analog Computing: Ariadne's Thread Was Made of Memristors. IEEE Trans. Emerg. Top. Comput. 6(1): 145-155 (2018) - [c8]Yu Yang, Dimitrios Stathis, Prashant Sharma, Kolin Paul, Ahmed Hemani, Manfred G. Grabherr, Rafi Ahmad:
RiBoSOM: rapid bacterial genome identification using self-organizing map implemented on the synchoros SiLago platform. SAMOS 2018: 105-114 - 2017
- [c7]Yu Yang, Syed M. A. H. Jafri, Ahmed Hemani, Dimitrios Stathis:
MTP-Caffe: Memory, Timing, and Power aware tool for mapping CNNs to GPUs. PARMA-DITAM@HiPEAC 2017: 31-36 - [c6]Syed M. A. H. Jafri, Ahmed Hemani, Dimitrios Stathis:
Can a reconfigurable architecture beat ASIC as a CNN accelerator? SAMOS 2017: 97-104 - 2016
- [j1]Ioannis Vourkas, Dimitrios Stathis, Georgios Ch. Sirakoulis, Said Hamdioui:
Alternative Architectures Toward Reliable Memristive Crossbar Memories. IEEE Trans. Very Large Scale Integr. Syst. 24(1): 206-217 (2016) - 2015
- [c5]Ioannis Vourkas, Dimitrios Stathis, Georgios Ch. Sirakoulis:
XbarSim: An educational simulation tool for memristive crossbar-based circuits. ISCAS 2015: 1798-1801 - [c4]Ioannis Vourkas, Dimitrios Stathis, Georgios Ch. Sirakoulis:
Live demonstration: XbarSim: An educational simulation tool for memristive crossbar-based circuits. ISCAS 2015: 1909 - 2014
- [c3]Dimitrios Stathis, Ioannis Vourkas, Georgios Ch. Sirakoulis:
Shortest Path Computing Using Memristor-Based Circuits and Cellular Automata. ACRI 2014: 398-407 - [c2]Dimitrios Stathis, Ioannis Vourkas, Georgios Ch. Sirakoulis:
Solving AI problems with memristors: A case study for optimal "bin packing". Panhellenic Conference on Informatics 2014: 30:1-30:6 - 2013
- [c1]Ioannis Vourkas, Dimitrios Stathis, Georgios Ch. Sirakoulis:
Improved read voltage margins with alternative topologies for memristor-based crossbar memories. VLSI-SoC 2013: 336-339
Coauthor Index
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last updated on 2024-11-08 21:31 CET by the dblp team
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