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ORCIDZia Abbas
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2020 – today
- 2024
[j12]Prasha Srivastava, Pawan Kumar, Zia Abbas
:
Qualitative data augmentation for performance prediction in VLSI circuits. Integr. 97: 102186 (2024)- [j11]Amir Ahmad, Sami M. Halawani, Ajay Kumar, Arshad Hashmi, Mutasem Jarrah, Abdul Rafey Ahmad, Zia Abbas:
A Theoretical Study of the Representational Power of Weighted Randomised Univariate Regression Tree Ensembles. J. Inf. Knowl. Manag. 23(4): 2450045:1-2450045:26 (2024) - [j10]Bhartipudi Sahishnavi, Arnab Dey, Anubhab Banerjee, Andleeb Zahra, Zia Abbas:
A 275 pW, 0.5 V supply insensitive gate-leakage based current/voltage reference circuit for a wide temperature range of -55 to 100 °C without using amplifiers and resistors. Microelectron. J. 150: 106277 (2024) - [j9]Deepthi Amuru, Raja Mavullu Vechalapu, Zia Abbas:
Transfer Learning Enabled Modeling Paradigm for PVT-aware Circuit Performance Estimation. ACM Trans. Design Autom. Electr. Syst. 29(6): 1-33 (2024) - [c49]Arpan Jain, Ashfakh Ali, Dheekshith Akula, Abhishek Pullela, Zia Abbas:
A Single-Point, Auto-Calibration Technique For PTAT/CTAT Resistance Based Current References. ISCAS 2024: 1-5 - [c48]Nouduru Venkata Raghavendra, Deepthi Amuru, Zia Abbas:
MetaCirc: A Meta-learning Approach for Statistical Leakage Estimation Improvement in Digital Circuits. ISCAS 2024: 1-5 - [c47]Bhartipudi Sahishnavi, Samriddhi Agarwal, Shameer Basha Yerragudi, Naveen Dasari, Andleeb Zahra, Prabhakar Bhimalapuram, Syed Azeemuddin, Zia Abbas:
An inductor-less, cost-effective On-chip CMOS VNA for bio-molecule detection. ISCAS 2024: 1-5 - [c46]Prasha Srivastava, Pawan Kumar, Zia Abbas:
Enhancing ML model accuracy for Digital VLSI circuits using diffusion models: A study on synthetic data generation. ISCAS 2024: 1-5 - [c45]Shiva Sharma, Koushik De, Bhartipudi Sahishnavi, Khanh M. Le, Zia Abbas:
Design and Optimization of Robust Process Monitors. MWSCAS 2024: 108-112 - [c44]Vishnu Kuncham, Jalluri Ram Gopal, V. S. S. Pradhith, Aniketh Atmakuri, Chetan Mittal, Khanh M. Le, Zia Abbas:
A Trim-Free PVT Invariant Current Reference with 0.48% Process Inaccuracy Using VTH Tracking Approach. MWSCAS 2024: 576-580 - [c43]Mehul Kumar Saraswat, Rajesh Mahadev, Shameer Basha Yerragudi, Khanh M. Le, Zia Abbas:
A Process and Temperature Compensation Technique for Ring-VCO in Charge-Pump PLL. MWSCAS 2024: 586-590 - [c42]Chetan Mittal, Jalluri Ramgopal, Khanh M. Le, Zia Abbas:
A 0.6V, 13nW, 0.0012%/V Line Sensitivity PVT - Invariant Voltage Reference Without Using Resistors and Amplifiers. MWSCAS 2024: 1101-1105 - [c41]Chetan Mittal, Arnab Dey, Anubhab Banerjee, Ashfakh Ali, Zia Abbas:
A 0.8-V, 593-pA Trim-free Duty-cycled All CMOS Current Reference for Ultra-Low Power IoT Applications. VLSID 2024: 599-604 - 2023
- [j8]Mohammed Salman Ahmed, Md. Kalesha, Andleeb Zahra, Zia Abbas:
Approximate Toom-Cook FFT with sparsity aware error tuning in a shared memory architecture. Integr. 89: 94-105 (2023) - [j7]Deepthi Amuru, Andleeb Zahra, Harsha V. Vudumula, Pavan K. Cherupally, Sushanth R. Gurram, Amir Ahmad, Zia Abbas:
AI/ML algorithms and applications in VLSI design and technology. Integr. 93: 102048 (2023) - [c40]Deepthi Amuru, Andleeb Zahra, Varnika Karakuram, Zia Abbas:
Design of Approximate Full Adders for Error Resilient Applications. ICCA 2023: 1-6 - [c39]Ashutosh Pathy, Andleeb Zahra, Amir Ahmad, Zia Abbas:
A High PSRR CMOS Voltage and Current Reference in One Circuit Without Amplifier for Low Power Applications. ICM 2023: 276-279 - [c38]Swarnim Sinha, Andleeb Zahra, Imran Siddiqui, Pawan Kumar, Alimpan Modak, Prabhakar Bhimalapuram, Tapan Sau, Syed Azeemuddin, Zia Abbas:
A Label-Free Low-Cost Radio Frequency Driven Noninvasive Lab-on-Chip System for Creatinine Detection. ICST 2023: 1-4 - [c37]Andleeb Zahra, Giampiero de Cesare, Domenico Caputo, Nicola Lovecchio, Prabhakar Bhimalapuram, Syed Azeemuddin, Zia Abbas:
Design and Fabrication of Microfluidic Chip for Temperature Control Applications in Biomedical. ICST 2023: 1-6 - [c36]Samriddhi Agarwal, Shameer Basha Yerragudi, Naveen Dasari, Inhee Lee, Zia Abbas:
An 18.5nW, 62.9dB PSRR, Switched-Capacitor Bandgap Voltage Reference using Low Power Clock Generator Circuit for Biomedical Applications. ISCAS 2023: 1-5 - [c35]Arnab Dey, Inhee Lee, Ashfakh Ali, Arpan Jain, Abhishek Pullela, Zia Abbas:
A 162nW, 0.845pJ/step Resistance-to-Digital Converter for Miniature Battery-Powered Sensing Systems. ISCAS 2023: 1-5 - [c34]Arnab Dey, Bharadwaj Subramaniam, Ashfakh Ali, Bhartipudi Sahishnavi, Abhishek Pullela, Zia Abbas:
A 2.3nW Gate-Leakage Based Sub-Bandgap Voltage Reference with Line Sensitivity of 0.0066%/V from -40°C to 150°C for Low-Power IoT Systems. ISCAS 2023: 1-5 - [c33]Ashfakh Huluvallay, Abhishek Pullela, Ehab A. Hamed, Arpan Jain, Naveen Dasari, Zia Abbas, Inhee Lee:
A 7 nW, 1 kHz, -40-170°C Relaxation Oscillator with Switch-Leakage Compensation for Low-Power High-Temperature IoT Systems. ISCAS 2023: 1-5 - [c32]Bhartipudi Sahishnavi, Sampath Kumar, Ashfakh Ali, Arnab Dey, Inhee Lee, Zia Abbas:
A 0.5V, pico-watt, 0.06%/V / 0.03%/V low supply sensitive current/voltage reference without using amplifiers and resistors. ISCAS 2023: 1-5 - [c31]Chetan Mittal, Arnab Dey, Ashfakh Ali, Khanh M. Le, Zia Abbas:
A 37nW, All-in-One Trim-Free Voltage/Current Reference Without Using Resistors and Amplifiers. MWSCAS 2023: 50-54 - [c30]Abhinav Vajrala, Dheekshith Akula, Arnab Dey, Khanh M. Le, Zia Abbas:
A 250pA, Gate-Leakage Based Trimming Free Current Reference, from -55°C to 150°C for Lower Power IoT Applications. MWSCAS 2023: 152-156 - [c29]Srayan Sankar Chatterjee, Arpit Sahni, Harikrishna Kambham, Zia Abbas, Abhishek Srivastava:
Design and Analysis of Low Power 20 GHz Colpitts VCO with FoM of 196.26 dBc/Hz. MWSCAS 2023: 679-683 - [i3]Prasha Srivastava, Pawan Kumar, Zia Abbas:
Qualitative Data Augmentation for Performance Prediction in VLSI circuits. CoRR abs/2302.07566 (2023) - [i2]Prasha Srivastava, Pawan Kumar, Zia Abbas:
Enhancing ML model accuracy for Digital VLSI circuits using diffusion models: A study on synthetic data generation. CoRR abs/2310.10691 (2023) - 2022
- [j6]Annapurna Kamadi, Zia Abbas:
Implementation of TRNG with SHA-3 for hardware security. Microelectron. J. 123: 105410 (2022) - [j5]Samriddhi Agarwal, Ashutosh Pathy, Zia Abbas:
A 9.5nW, 0.55V Supply, CMOS Current Reference for Low Power Biomedical Applications. IEEE Trans. Circuits Syst. II Express Briefs 69(9): 3650-3654 (2022) - [c28]Abhishek Pullela, Ashfakh Ali, Arpan Jain, Inhee Lee, Zia Abbas:
A 156pW Gate-Leakage Based Voltage/Current Reference for Low-Power IoT Systems. ISCAS 2022: 1923-1927 - [c27]Kushagra Agarwal, Aryamaan Jain, Deepthi Amuru, Zia Abbas:
Fast and efficient ResNN and Genetic optimization for PVT aware performance enhancement in digital circuits. VLSI-DAT 2022: 1-4 - [c26]Arpan Jain, Abhishek Pullela, Ashfakh Ali, Zia Abbas:
A 180o Phase Shift Biasing Technique for Realizing High PSRR in Low Power Temperature Sensors. VLSID 2022: 33-38 - [i1]Deepthi Amuru, Harsha V. Vudumula, Pavan K. Cherupally, Sushanth R. Gurram, Amir Ahmad, Andleeb Zahra, Zia Abbas:
AI/ML Algorithms and Applications in VLSI Design and Technology. CoRR abs/2202.10015 (2022) - 2021
- [c25]Hema Sai Kalluru, Prasenjit Saha, Andleeb Zahra, Zia Abbas:
Algorithm Driven Power-Timing Optimization Methodology for CMOS Digital Circuits Considering PVTA Variations. ISCAS 2021: 1-5 - [c24]Abhishek Pullela, Ashfakh Ali, Arpan Jain, Adithya Banthi, Zia Abbas:
A 419pW Process-Invariant Temperature Sensor for Ultra-Low Power Microsystems. ISCAS 2021: 1-5 - [c23]Prasenjit Saha, Salman Ahmed, Hema Sai Kalluru, Zia Abbas:
Low Power PVT-Aware Transistor Sizing and Approximate Design Generation for Standard Cells Using Swarm Intelligence. ISCAS 2021: 1-5 - [c22]Hema Sai Kalluru, Prasenjit Saha, Andleeb Zahra, Zia Abbas:
PVT and Aging Degradation Invariant Automated Optimization Approach for CMOS Low-Power High-Performance VLSI Circuits. ISQED 2021: 1-6 - [c21]Abhishek Pullela, Ashfakh Ali, Sushanth Reddy, Arpan Jain, Zia Abbas:
A 443pW Accumulation-Mode Gate-Leakage Based Bandgap Reference for IoT Applications. MWSCAS 2021: 986-989 - [c20]Ashutosh Pathy, Adithya Banthi, Zia Abbas:
A 0.85V Supply, High PSRR CMOS Voltage Reference without Resistor and Amplifier for Ultra-Low Power Applications. MWSCAS 2021: 995-998 - [c19]Prasenjit Saha, Hema Sai Kalluru, Zia Abbas:
Transistor Sizing based PVT-Aware Low Power Optimization using Swarm Intelligence. VLSID 2021: 234-239 - 2020
- [c18]Mohammed Salman Ahmed, Deepthi Amuru, Zia Abbas:
ATM: Approximate Toom-Cook Multiplication for Speech Processing Applications. ISCAS 2020: 1-5 - [c17]Deepthi Amuru, Mohammed Salman Ahmed, Zia Abbas:
An Efficient Gradient Boosting Approach for PVT Aware Estimation of Leakage Power and Propagation Delay in CMOS/FinFET Digital Cells. ISCAS 2020: 1-5 - [c16]Balaji Yadav Battu, Mounika Kelam, Adithya Bathi, Zia Abbas:
67ppm/°C, 66nA PVT Invariant Curvature Compensated Current Reference for Ultra-Low Power Applications. ISCAS 2020: 1-5 - [c15]Balaji Yadav Battu, Mounika Kelam, Koushik De, Zia Abbas:
Low Quiescent Current, Capacitor-Less LDO with Adaptively Biased Power Transistors and Load Aware Feedback Resistance. ISCAS 2020: 1-5 - [c14]Mounika Kelam, Balaji Yadav Battu, Zia Abbas:
A Compact, Power Efficient, Self-Adaptive and PVT Invariant CMOS Relaxation Oscillator. ISVLSI 2020: 1-6 - [c13]Ashfakh Ali, Abhishek Pullela, Arpan Jain, Zia Abbas:
A Sub-nW, 8T Current Reference Consuming Constant Power w.r.t Process & Temperature. MWSCAS 2020: 730-733 - [c12]Mounika Kelam, Balaji Yadav Battu, Zia Abbas:
3.75ppm/°C, -91dB PSRR, 27nW, 0.9V PVT Invariant Voltage Reference for Implantable Biomedical Applications. VLSID 2020: 31-36
2010 – 2019
- 2019
- [c11]Shirisha Gourishetty, Harshini Mandadapu, Andleeb Zahra, Zia Abbas:
A Highly Accurate Machine Learning Approach to Modelling PVT Variation Aware Leakage Power in FinFET Digital Circuits. APCCAS 2019: 61-64 - [c10]Mohammed Salman Ahmed, Zia Abbas:
A Memetic Algorithm Based PVT Variation-Aware Robust Transistor Sizing Scheme for Power-Delay Optimal Digital Standard Cell Design. ICCD 2019: 385-392 - [c9]Prateek Gupta, Shirisha Gourishetty, Harshini Mandadapu, Zia Abbas:
PVT Variations Aware Robust Transistor Sizing for Power-Delay Optimal CMOS Digital Circuit Design. ISCAS 2019: 1-5 - [c8]Arpan Jain, Ashfakh Ali, Sai Kiran, Zia Abbas:
A High PSRR, Stable CMOS Current Reference using Process Insensitive TC of Resistance for Wide Temperature Applications. ISCAS 2019: 1-5 - [c7]Prateek Gupta, Harshini Mandadapu, Shirisha Gourishetty, Zia Abbas:
Robust Transistor Sizing for Improved Performances in Digital Circuits using Optimization Algorithms. ISQED 2019: 85-91 - [c6]Deepthi Amuru, Andleeb Zahra, Zia Abbas:
Statistical Variation Aware Leakage and Total Power Estimation of 16 nm VLSI Digital Circuits Based on Regression Models. VDAT 2019: 565-578 - [c5]Ashfakh Ali, Sai Kiran, Arpan Jain, Zia Abbas:
A 47nW, 0.7-3.6V wide Supply Range, Resistor Based Temperature Sensor for IoT Applications. VLSI-SoC 2019: 293-298 - 2018
- [c4]Prateek Gupta, Shubham Kumar, Zia Abbas:
Optimal Transistor Sizing of Full-Adder Block to Reduce Standby Leakage Power. VDAT 2018: 88-99 - [c3]Ashfakh Ali, Arpan Jain, Zia Abbas:
Voltage Level Adapter Design for High Voltage Swing Applications in CMOS Differential Amplifier. VDAT 2018: 130-139 - [c2]Zia Abbas, Andleeb Zahra, Mauro Olivieri:
LEADER: Leakage Currents Estimation Technique for Aging Degradation Aware 16 nm CMOS Circuits. VDAT 2018: 394-407 - 2016
- [j4]Zia Abbas, Mauro Olivieri:
Optimal transistor sizing for maximum yield in variation-aware standard cell design. Int. J. Circuit Theory Appl. 44(7): 1400-1424 (2016) - 2014
- [j3]Zia Abbas, Mauro Olivieri:
Impact of technology scaling on leakage power in nano-scale bulk CMOS digital standard cells. Microelectron. J. 45(2): 179-195 (2014) - [j2]Zia Abbas, Antonio Mastrandrea, Mauro Olivieri:
A Voltage-Based Leakage Current Calculation Scheme and its Application to Nanoscale MOSFET and FinFET Standard-Cell Designs. IEEE Trans. Very Large Scale Integr. Syst. 22(12): 2549-2560 (2014) - 2013
- [j1]Zia Abbas, Mauro Olivieri, Marat Yakupov, Andreas Ripp:
Design centering/yield optimization of power aware band pass filter based on CMOS current controlled current conveyor (CCCII+). Microelectron. J. 44(4): 321-331 (2013) - 2012
- [c1]Zia Abbas, Marat Yakupov, Mauro Olivieri, Andreas Ripp, Gunter Strube:
Yield optimization for low power current controlled current conveyor. SBCCI 2012: 1-6
Coauthor Index
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