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2010 – 2019
- 2018
[d1]Navneet Gupta, Adam Makosiej, Amara Amara, Andrei Vladimirescu, Costin Anghel:
Related references for extended TED submission (uDRAM and uSRAM reference papers). IEEE DataPort, 2018
- 2017
- [c18]Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel:
Tunnel FET based refresh-free-DRAM. DATE 2017: 914-917 - [c17]Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel:
1.56GHz/0.9V energy-efficient reconfigurable CAM/SRAM using 6T-CMOS bitcell. ESSCIRC 2017: 316-319 - [c16]Marcelino Seif, Emna Farjallah, Franck Badets
, Emna Chabchoub, Christophe Layer, Jean-Marc Armani, Francis Joffre, Costin Anghel, Luigi Dilillo, Valentin Gherman:
Refresh frequency reduction of data stored in SSDs based on A-timer and timestamps. ETS 2017: 1-6 - [c15]Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel:
Tunnel FET based ultra-low-leakage compact 2T1C SRAM. ISQED 2017: 71-75 - 2016
- [c14]Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel:
3T-TFET bitcell based TFET-CMOS hybrid SRAM design for Ultra-Low Power applications. DATE 2016: 361-366 - [c13]Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel:
16Kb hybrid TFET/CMOS reconfigurable CAM/SRAM array based on 9T-TFET bitcell. ESSDERC 2016: 356-359 - [c12]Nuraishah Sarimin, Rahma Abdaoui, Costin Anghel:
A 2-Gb/s 60 GHz transmission-gate based 130nm CMOS on-off keying modulator. ICECS 2016: 420-422 - [c11]Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel:
Ultra-compact SRAM design using TFETs for low power low voltage applications. ISCAS 2016: 594-597 - [c10]Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Costin Anghel:
Ultra-Low-Power compact TFET Flip-Flop design for high-performance low-voltage applications. ISQED 2016: 107-112 - [c9]Navneet Gupta, Adam Makosiej, Andrei Vladimirescu, Amara Amara, Sorin Cotofana, Costin Anghel:
TFET NDR skewed inverter based sensing method. NANOARCH 2016: 13-14 - 2015
- [c8]Navneet Gupta, Adam Makosiej, Oliver Thomas, Amara Amara, Andrei Vladimirescu, Costin Anghel:
Ultra-low leakage sub-32nm TFET/CMOS hybrid 32kb pseudo DualPort scratchpad with GHz speed for embedded applications. ISCAS 2015: 597-600 - [c7]Andrei Vladimirescu, Costin Anghel, Amara Amara, Navneet Gupta, Adam Makosiej:
Sub-picowatt retention mode TFET memory for CMOS sensor processing nodes. IWASI 2015: 266-270 - [c6]Amara Amara, Navneet Gupta, Khaja Ahmad Shaik, Costin Anghel, Kiyoo Itoh:
Energy efficiency optimization for digital applications in 28nm UTBB FDSOI technology. MIXDES 2015: 23 - 2014
- [j1]Ogun Turkyilmaz, Santhosh Onkaraiah, Marina Reyboz, Fabien Clermidy, Hraziia, Costin Anghel, Jean-Michel Portal, Marc Bocquet:
RRAM-based FPGA for "Normally Off, Instantly On" applications. J. Parallel Distributed Comput. 74(6): 2441-2451 (2014) - [c5]Walter E. Calienes Bartra, Ricardo Augusto da Luz Reis, Costin Anghel, Andrei Vladimirescu:
Bulk and FDSOI SRAM resiliency to radiation effects. MWSCAS 2014: 655-658 - 2012
- [c4]Adam Makosiej, Rutwick Kumar Kashyap, Andrei Vladimirescu, Amara Amara, Costin Anghel:
A 32nm tunnel FET SRAM for ultra low leakage. ISCAS 2012: 2517-2520 - [c3]Ogun Turkyilmaz, Santhosh Onkaraiah, Marina Reyboz, Fabien Clermidy, Hraziia, Costin Anghel, Jean-Michel Portal, Marc Bocquet:
RRAM-based FPGA for "normally off, instantly on" applications. NANOARCH 2012: 101-108 - [c2]Santhosh Onkaraiah, Marina Reyboz, Fabien Clermidy, Jean-Michel Portal, Marc Bocquet, Christophe Muller, Hraziia, Costin Anghel, Amara Amara:
Bipolar ReRAM Based non-volatile flip-flops for low-power architectures. NEWCAS 2012: 417-420
2000 – 2009
- 2006
- [c1]Yogesh Singh Chauhan, Costin Anghel, François Krummenacher, Renaud Gillon, Andre Baguenier, Bart Desoete, Steven Frere, Adrian Mihai Ionescu, Michel J. Declercq:
A Compact DC and AC Model for Circuit Simulation of High Voltage VDMOS Transistor. ISQED 2006: 109-114
Coauthor Index
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