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ORCIDDale E. Hocevar
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Books and Theses
- 1982
[b1]Dale E. Hocevar:
Automatic Tuning Algorithms and Statistical Circuit Design. University of Illinois Urbana-Champaign, USA, 1982
Journal Articles
- 1991
- [j8]Paul F. Cox, Richard Burch, Dale E. Hocevar, Ping Yang, Berton D. Epler:
Direct circuit simulation algorithms for parallel processing [VLSI]. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(6): 714-725 (1991) - 1989
- [j7]Paul F. Cox, Richard Burch, Ping Yang, Dale E. Hocevar:
New implicit integration method for efficient latency exploitation in circuit simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(10): 1051-1064 (1989) - 1988
- [j6]Dale E. Hocevar, Paul F. Cox, Ping Yang:
Parametric yield optimization for MOS circuit blocks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(6): 645-658 (1988) - 1987
- [j5]Joseph E. Hall, Dale E. Hocevar, Ping Yang, Michael J. McGraw:
SPIDER -- A CAD System for Modeling VLSI Metallization Patterns. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(6): 1023-1031 (1987) - 1986
- [j4]Ping Yang, Dale E. Hocevar, Paul F. Cox, Charles F. Machala III, Pallab K. Chatterjee:
An Integrated and Efficient Approach for MOS VLSI Statistical Circuit Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 5(1): 5-14 (1986) - 1985
- [j3]Dale E. Hocevar, Ping Yang, Timothy N. Trick, Berton D. Epler:
Transient Sensitivity Computation for MOSFET Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 4(4): 609-620 (1985) - 1984
- [j2]Dale E. Hocevar, Michael R. Lightner, Timothy N. Trick:
An Extrapolated Yield Approximation Technique for Use in Yield Maximization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 3(4): 279-287 (1984) - 1983
- [j1]Dale E. Hocevar, Michael R. Lightner, Timothy N. Trick:
A Study of Variance Reduction Techniques for Estimating Circuit Yields. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2(3): 180-192 (1983)
Conference and Workshop Papers
- 2006
- [c10]Yuming Zhu, Yanni Chen, Dale E. Hocevar, Manish Goel:
A Reduced-Complexity, Scalable Implementation of Low Density Parity Check (LDPC) Decoder. SiPS 2006: 83-88 - 2003
- [c9]Yanni Chen, Dale E. Hocevar:
A FPGA and ASIC implementation of rate 1/2, 8088-b irregular low density parity check decoder. GLOBECOM 2003: 113-117 - [c8]Dale E. Hocevar:
Efficient encoding for a family of quasi-cyclic LDPC codes. GLOBECOM 2003: 3996-4000 - [c7]Dale E. Hocevar:
LDPC code construction with flexible hardware implementation. ICC 2003: 2708-2712 - 2002
- [c6]Tod Wolf, Dale E. Hocevar, Alan Gatherer, Patrick Geremia, Armelle Laine:
600 MHz DSP for baseband processing in 3G base stations. CICC 2002: 393-396 - 2001
- [c5]Tarik Muharemovic, Alan Gatherer, Will Ebel, Srinath Hosur, Dale E. Hocevar, Everest Huang:
Space-time codes with bit interleaving. GLOBECOM 2001: 1088-1092 - [c4]Everest Huang, Alan Gatherer, Tarik Muharemovic, Dale E. Hocevar:
Improving performance of a space-time turbo code in a Rayleigh fading channel. VTC Fall 2001: 3-7 - 1998
- [c3]Dale E. Hocevar, Ching-Yu Hung, Dan Pickens, Sundararajan Sriram:
Top-Down Design Using Cycle Based Simulation: an MPEG A/V Decoder Example. Great Lakes Symposium on VLSI 1998: 400- - 1990
- [c2]Dale E. Hocevar, Rajeev Arora, Uttiya Dasgupta, Sattam Dasgupta, Nagaraj Subramanyam, Sham Kashyap:
A Usable Circuit Optimizer for Designers. ICCAD 1990: 290-293 - 1988
- [c1]Richard Burch, Farid N. Najm, Ping Yang, Dale E. Hocevar:
Pattern-Independent Current Estimation for Reliability Analysis of CMOS Circuits. DAC 1988: 294-299
Coauthor Index
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