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2010 – 2019
- 2011
[c3]Michael Kistler, Daniel A. Brokenshire:
Detecting race conditions in asynchronous DMA operations with full system simulation. ISPASS 2011: 207-215- 2010
- [p1]Alex Chung Hen Chow, Gordon C. Fossum, Daniel A. Brokenshire:
Implementing FFTs on Multicore Architectures. Scientific Computing with Multicore and Accelerators 2010: 171-192
2000 – 2009
- 2009
- [j5]Michael Kistler, John A. Gunnels, Daniel A. Brokenshire, Brad Benton:
Programming the Linpack benchmark for Roadrunner. IBM J. Res. Dev. 53(5): 9 (2009) - [j4]Michael Kistler, John A. Gunnels, Daniel A. Brokenshire, Brad Benton:
Programming the Linpack benchmark for the IBM PowerXCell 8i processor. Sci. Program. 17(1-2): 43-57 (2009) - [c2]Michael Kistler, John A. Gunnels, Daniel A. Brokenshire, Brad Benton:
Petascale computing with accelerators. PPoPP 2009: 241-250 - 2007
- [j3]Charles R. Johns, Daniel A. Brokenshire:
Introduction to the Cell Broadband Engine Architecture. IBM J. Res. Dev. 51(5): 503-520 (2007) - [j2]Brian K. Flachs, Shigehiro Asano, Sang H. Dhong, H. Peter Hofstee, Gilles Gervais, Roy Kim, Tien Le, Peichun Liu, Jens Leenstra, John S. Liberty, Brad W. Michael, Hwa-Joon Oh, Silvia M. Müller, Osamu Takahashi, Koji Hirairi, Atsushi Kawasumi, Hiroaki Murakami, Hiromi Noro, Shoji Onishi, Juergen Pille, Joel Silberman, Suksoon Yong, Akiyuki Hatakeyama, Yukio Watanabe, Naoka Yano, Daniel A. Brokenshire, Mohammad Peyravian, VanDung To, Eiji Iwata:
Microarchitecture and implementation of the synergistic processor in 65-nm and 90-nm SOI. IBM J. Res. Dev. 51(5): 529-544 (2007) - 2006
- [j1]Brian K. Flachs, Shigehiro Asano, Sang H. Dhong, H. Peter Hofstee, Gilles Gervais, Roy Kim, Tien Le, Peichun Liu, Jens Leenstra, John S. Liberty, Brad W. Michael, Hwa-Joon Oh, Silvia Melitta Müller, Osamu Takahashi, A. Hatakeyama, Yukio Watanabe, Naoka Yano, Daniel A. Brokenshire, Mohammad Peyravian, Vandung To, Eiji Iwata:
The microarchitecture of the synergistic processor for a cell processor. IEEE J. Solid State Circuits 41(1): 63-70 (2006) - [c1]Yukio Watanabe, Balazs Sallay, Brad W. Michael, Daniel A. Brokenshire, Gavin Meil, Hazim Shafi, Daisuke Hiraoka:
An SPU reference model for simulation, random test generation and verification. ASP-DAC 2006: 860-866
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