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2020 – today
- 2023
[j16]Boyang Du, Congju Du
, Li Yu:
MEGF-Net: multi-exposure generation and fusion network for vehicle detection under dim light conditions. Vis. Intell. 1(1) (2023)- 2022
- [j15]Xiaowei Feng, Xiangyu Kong, Boyang Du, Jiayu Luo:
Adaptive LII-RMPLS based data-driven process monitoring scheme for quality-relevant fault detection. J. Control. Decis. 9(4): 477-488 (2022) - [j14]Boyang Du, Sarah Azimi, Annarita Moramarco, Davide Sabena, Filippo Parisi, Luca Sterpone:
An Automated Continuous Integration Multitest Platform for Automotive Systems. IEEE Syst. J. 16(2): 2495-2506 (2022) - 2021
- [j13]Xiaowei Feng, Xiangyu Kong, Zhongying Xu, Boyang Du:
An Effective Principal Singular Triplets Extracting Neural Network Algorithm. Neural Process. Lett. 53(4): 2795-2811 (2021) - [c26]Ludovica Bozzoli, Corrado De Sio, Boyang Du, Luca Sterpone:
A Neutron Generator Testing Platform for the Radiation Analysis of SRAM-based FPGAs. I2MTC 2021: 1-5 - 2020
- [j12]Boyang Du, Xiangyu Kong, Xiaowei Feng:
Generalized Principal Component Analysis-Based Subspace Decomposition of Fault Deviations and Its Application to Fault Reconstruction. IEEE Access 8: 34177-34186 (2020) - [j11]Xiangyu Kong, Boyang Du, Xiaowei Feng, Jiayu Luo:
Unified and Self-Stabilized Parallel Algorithm for Multiple Generalized Eigenpairs Extraction. IEEE Trans. Signal Process. 68: 3644-3659 (2020)
2010 – 2019
- 2019
- [j10]Corrado De Sio, Sarah Azimi, Luca Sterpone, Boyang Du:
Analyzing Radiation-Induced Transient Errors on SRAM-Based FPGAs by Propagation of Broadening Effect. IEEE Access 7: 140182-140189 (2019) - [j9]Sarah Azimi, Boyang Du, Luca Sterpone, David Merodio Codinachs, Raoul Grimoldi, L. Cattaneo:
A new CAD tool for Single Event Transient Analysis and mitigation on Flash-based FPGAs. Integr. 67: 73-81 (2019) - [c25]Boyang Du, Sarah Azimi, Corrado De Sio, Ludovica Bozzoli, Luca Sterpone:
On the Reliability of Convolutional Neural Network Implementation on SRAM-based FPGA. DFT 2019: 1-6 - [c24]Boyang Du, Josie E. Rodriguez Condia, Matteo Sonza Reorda:
An extended model to support detailed GPGPU reliability analysis. DTIS 2019: 1-6 - [c23]Boyang Du, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Luca Sterpone:
On the evaluation of SEU effects in GPGPUs. LATS 2019: 1-6 - [c22]Luca Sterpone, Ludovica Bozzoli, Corrado De Sio, Boyang Du, Sarah Azimi:
A new Method for the Analysis of Radiation-induced Effects in 3D VLSI Face-to-Back LUTs. SMACD 2019: 205-208 - 2018
- [j8]Li Hongzeng, Boyang Du, Xiangyu Kong, Yingbin Gao, Changhua Hu, Xuhao Bian:
A Generalized Minor Component Extraction Algorithm and Its Analysis. IEEE Access 6: 36771-36779 (2018) - [j7]Xiangyu Kong, Zehao Cao, Qiusheng An, Yingbin Gao, Boyang Du:
Quality-Related and Process-Related Fault Monitoring With Online Monitoring Dynamic Concurrent PLS. IEEE Access 6: 59074-59086 (2018) - [j6]Sarah Azimi, Luca Sterpone, Boyang Du, Luca Boragno:
On the analysis of radiation-induced Single Event Transients on SRAM-based FPGAs. Microelectron. Reliab. 88-90: 936-940 (2018) - [c21]Luca Sterpone, Sarah Azimi, Ludovica Bozzoli, Boyang Du, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Cesar Boatella Polo, David Merodio Codinachs:
A Novel Error Rate Estimation Approach forUltraScale+ SRAM-based FPGAs. AHS 2018: 120-126 - [c20]Sarah Azimi, Boyang Du, Luca Sterpone:
On the mitigation of single event transients on flash-based FPGAs. ETS 2018: 1-2 - [c19]Boyang Du, Josie E. Rodriguez Condia, Matteo Sonza Reorda, Luca Sterpone:
About the functional test of the GPGPU scheduler. IOLTS 2018: 85-90 - [c18]Sarah Azimi, Boyang Du, Luca Sterpone, David Merodio Codinachs, L. Cattaneo:
SETA: A CAD Tool for Single Event Transient Analysis and Mitigation on Flash-Based FPGAs. SMACD 2018: 1-52 - 2017
- [j5]Sarah Azimi, Boyang Du, Luca Sterpone:
Evaluation of transient errors in GPGPUs for safety critical applications: An effective simulation-based fault injection environment. J. Syst. Archit. 75: 95-106 (2017) - [j4]Qiutao Zhang, Sarah Azimi, Germano La Vaccara, Luca Sterpone, Boyang Du:
A new approach for Total Ionizing Dose effect analysis on Flash-based FPGA. Microelectron. Reliab. 76-77: 58-63 (2017) - [c17]Luca Sterpone, Sarah Azimi, Boyang Du, David Merodio Codinachs, Raoul Grimoldi:
Effective Mitigation of Radiation-induced Single Event Transient on Flash-based FPGAs. ACM Great Lakes Symposium on VLSI 2017: 203-208 - [c16]Boyang Du, Luca Sterpone:
Online monitoring soft errors in reconfigurable FPGA during radiation test. I2MTC 2017: 1-5 - [c15]Boyang Du, Luca Sterpone:
Fault tolerant electronic system design. ITC 2017: 1-6 - 2016
- [b1]Boyang Du:
Fault Tolerant Electronic System Design. Polytechnic University of Turin, Italy, 2016 - [j3]Sarah Azimi, Boyang Du, Luca Sterpone:
On the prediction of radiation-induced SETs in flash-based FPGAs. Microelectron. Reliab. 64: 230-234 (2016) - [j2]Boyang Du, Matteo Sonza Reorda, Luca Sterpone, Luis Parra, Marta Portela-García, Almudena Lindoso, Luis Entrena:
Online Test of Control Flow Errors: A New Debug Interface-Based Approach. IEEE Trans. Computers 65(6): 1846-1855 (2016) - [c14]Sarah Azimi, Boyang Du, Luca Sterpone:
A New Simulation-Based Fault Injection Approach for the Evaluation of Transient Errors in GPGPUs. ARCS 2016: 388-400 - [c13]Boyang Du, Ernesto Sánchez, Matteo Sonza Reorda, Julio Pérez Acle, Anton Tsertov:
FPGA-controlled PCBA power-on self-test using processor's debug features. DDECS 2016: 125-130 - [c12]Boyang Du, Luca Sterpone, David Merodio Codinachs:
A new EDA flow for the mitigation of SEUs in dynamic reconfigurable FPGAs. ETS 2016: 1-2 - [c11]Boyang Du, Guoliang Zhang, Jun Xu, Jing Zeng, Yong Zhang:
Consensus of Discrete-Time Linear Networked Multi-agent Systems Subject to Actuator Saturation. IAS 2016: 601-613 - [c10]Luca Sterpone, Gianpiero Cabodi, Sebastiano F. Finocchiaro, Carmelo Loiacono, Francesco Savarese, Boyang Du:
Scalable FPGA graph model to detect routing faults. IOLTS 2016: 155-160 - [c9]Eduardo Chielle, Boyang Du, Fernanda Lima Kastensmidt, Sergio Cuenca-Asensi, Luca Sterpone, Matteo Sonza Reorda:
Hybrid soft error mitigation techniques for COTS processor-based systems. LATS 2016: 99-104 - [c8]Boyang Du, Luca Sterpone:
An FPGA-based testing platform for the validation of automotive powertrain ECU. VLSI-SoC 2016: 1-7 - 2015
- [j1]Luca Sterpone, Boyang Du, Sarah Azimi:
Radiation-induced single event transients modeling and testing on nanometric flash-based technologies. Microelectron. Reliab. 55(9-10): 2087-2091 (2015) - [c7]Luca Sterpone, Boyang Du:
SET-PAR: Place and Route Tools for the Mitigation of Single Event Transients on Flash-Based FPGAs. ARC 2015: 129-140 - [c6]Boyang Du, Luca Sterpone, Lorenzo Venditti, David Merodio Codinachs:
On the design of highly reliable system-on-chip using dynamically reconfigurable FPGAs. ReCoSoC 2015: 1-6 - 2014
- [c5]Luca Sterpone, Boyang Du:
Analysis and mitigation of single event effects on flash-based FPGAS. ETS 2014: 1-6 - [c4]Boyang Du, Matteo Sonza Reorda, Luca Sterpone, Luis Parra, Marta Portela-García, Almudena Lindoso, Luis Entrena:
A new solution to on-line detection of Control Flow Errors. IOLTS 2014: 105-110 - 2013
- [c3]Boyang Du, Matteo Sonza Reorda, Luca Sterpone, Luis Parra, Marta Portela-García, Almudena Lindoso, Luis Entrena:
Exploiting the debug interface to support on-line test of control flow errors. IOLTS 2013: 98-103 - [c2]Paolo Bernardi, Riccardo Cantoro, Lyl M. Ciganda Brasca, Boyang Du, Ernesto Sánchez, Matteo Sonza Reorda, Michelangelo Grosso, Oscar Ballan:
On the Functional Test of the Register Forwarding and Pipeline Interlocking Unit in Pipelined Processors. MTV 2013: 52-57
2000 – 2009
- 2007
- [c1]Mingxin Men, Yuepu Qi, Boyang Du, Hao Xu:
Freis: A Web-based Resources and Environment Information System for Agro-ecosystem Management. CCTA 2007: 891-898
Coauthor Index
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