"A Novel Error Rate Estimation Approach forUltraScale+ SRAM-based FPGAs."

Luca Sterpone et al. (2018)

> Home

Details and statistics

DOI: 10.1109/AHS.2018.8541474

access: closed

type: Conference or Workshop Paper

metadata version: 2021-10-14

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/ahs/SterponeABDLGAP18
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/ahs/SterponeABDLGAP18
Luca Sterpone, Sarah Azimi, Ludovica Bozzoli, Boyang Du, Thomas Lange, Maximilien Glorieux, Dan Alexandrescu, Cesar Boatella Polo, David Merodio Codinachs:
A Novel Error Rate Estimation Approach forUltraScale+ SRAM-based FPGAs. AHS 2018: 120-126

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.