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ORCIDIET Computers & Digital Techniques, Volume 13
Volume 13, Number 1, 2019
- Kollaparampil Somasekharan Sreekala, Sukumarapillai Krishnakumar:
State retained dual-V th feedback sleeper-stack for leakage reduction. 1-10 - Ebadollah Taheri, Karim Mohammadi, Ahmad Patooghy
:
ON-OFF: a reactive routing algorithm for dynamic thermal management in 3D NoCs. 11-19 - Fatma Ezahra Sayadi, Marwa Chouchene, Haythem Bahri, Randa Khemiri, Mohamed Atri:
CUDA memory optimisation strategies for motion estimation. 20-27 - Mohammad Gh. AlFailakawi, Mohammed El-Shafei, Imtiaz Ahmad, Ayed A. Salman:
FPGA-based implementation of cuckoo search. 28-37 - Chandan Bandyopadhyay, Rakesh Das, Anupam Chattopadhyay, Hafizur Rahaman:
Design and synthesis of improved reversible circuits using AIG- and MIG-based graph data structures. 38-48 - Somesh Kumar, Rohit Sharma:
Investigating the role of interconnect surface roughness towards the design of power-aware network on chip. 49-56
Volume 13, Number 2, 2019
- Alessandro de Gennaro, Paulius Stankaitis, Andrey Mokhov:
Efficient composition of scenario-based hardware specifications. 57-69 - Nupur Jain, Biswajit Mishra:
Light-weight configurable architecture for QRS detection. 70-77 - S. Kala, Jimson Mathew, Babita R. Jose, Nalesh Sivanandan:
Radix-43 based two-dimensional FFT architecture with efficient data reordering scheme. 78-86 - Micheal Arockiaraj, Jia-Bao Liu, Arul Jeya Shalini:
Vertex decomposition method for wirelength problem and its applications to enhanced hypercube networks. 87-92 - Kalyan Baital, Amlan Chakrabarti:
Dynamic scheduling of tasks for multi-core real-time systems based on optimum energy and throughput. 93-100 - Khokan Mondal, Subhajit Chatterjee, Tuhina Samanta:
An algorithm for obstacle-avoiding clock routing tree construction with multiple TSVs on a 3D IC. 102-109 - Alexander E. Beasley, Robert J. Watson, Christopher T. Clarke:
Efficient digital implementation of a multi-precision square-root algorithm. 110-117 - Cheng-Hung Lin, Yuan-Syun Wu, Chen-Pei Song:
Energy-efficient LDPC codec design using cost-effective early termination scheme. 118-125
Volume 13, Number 3, 2019
- Antonio Miele, Martin A. Trefzer, S. Saqib Khursheed:
Guest Editorial: Defect and Fault Tolerance in VLSI and Nanotechnology Systems. 127-128 - Chao Chen, Jacopo Panerati, Meng Li, Giovanni Beltrame:
Probabilistic timing analysis of time-randomised caches with fault detection mechanisms. 129-139 - Lake Bu, Mark G. Karpovsky, Michel A. Kinsy:
Design of reliable storage and compute systems with lightweight group testing based non-binary error correction codes. 140-153 - Nguyen Tran Huu Nguyen, Ediz Cetin, Oliver Diessel:
Scheduling configuration memory error checks to improve the reliability of FPGA-based systems. 154-165 - Arpan Chakraborty, Piyali Datta, Rajat Kumar Pal:
Fluid-level synthesis unifying reliability, contamination avoidance, and capacity-wastage-aware washing for droplet-based microfluidic biochips. 166-177 - Fernando Fernandes dos Santos, Luigi Carro, Paolo Rech:
Kernel and layer vulnerability factor to evaluate object detection reliability in GPUs. 178-186 - Pai-Shun Ting, John P. Hayes:
Removing constant-induced errors in stochastic circuits. 187-197 - Arezoo Kamran:
HASTI: hardware-assisted functional testing of embedded processors in idle times. 198-205 - Lake Bu, Mihailo Isakov, Michel A. Kinsy:
RASSS: a hijack-resistant confidential information management scheme for distributed systems. 206-217 - Dong-Woo Lee, Jongwhoa Na:
Study of the monte-carlo fault injection simulator to measure a fault derating. 218-223 - Yota Kurokawa, Masaru Fukushi:
Design of an extended 2D mesh network-on-chip and development of A fault-tolerant routing method. 224-232 - Shoba Gopalakrishnan, Virendra Singh:
Soft-error reliable architecture for future microprocessors. 233-242 - Ambika Prasad Shah, Nandakishor Yadav, Ankur Beohar, Santosh Kumar Vishvakarma:
SUBHDIP: process variations tolerant subthreshold Darlington pair-based NBTI sensor circuit. 243-249 - Ahmad Alzahrani, Ronald F. DeMara:
Leveraging design diversity to counteract process variation: theory, method, and FPGA toolchain to increase yield and resilience in-situ. 250-261 - Yang Zhang, Ji Li, Huimei Cheng, Haipeng Zha, Jeffrey Draper, Peter A. Beerel:
Yield modelling and analysis of bundled data and ring-oscillator based designs. 262-272
Volume 13, Number 4, 2019
- Yuan Wang, Martin A. Trefzer, Simon J. Bale, James Alfred Walker, Andy M. Tyrrell:
Multi-objective optimisation algorithm for routability and timing driven circuit clustering on FPGAs. 273-281 - Bahram Rashidi:
Efficient hardware structure for extended Euclidean-based inversion over F 2 m. 282-291 - Mike Borowczak, Ranga Vemuri:
Mitigating information leakage during critical communication using S*FSM. 292-301 - Rafael Garibotti, Luciano Ost, Anastasiia Butko, Ricardo Reis, Abdoulaye Gamatié, Gilles Sassatelli:
Exploiting memory allocations in clusterised many-core architectures. 302-311 - Saeide Sheikhpour, Ali Mahani, Nasour Bagheri:
High throughput fault-resilient AES architecture. 312-323 - Aravindhan Alagarsamy, Gopalakrishnan Lakshminarayanan, Seok-Bum Ko:
KBMA: A knowledge-based multi-objective application mapping approach for 3D NoC. 324-334 - Amin Mehranzadeh, Ahmad Khademzadeh, Nader Bagherzadeh, Midia Reshadi:
DICA: destination intensity and congestion-aware output selection strategy for network-on-chip systems. 335-347 - Mingfu Xue, Rongzhen Bian, Jian Wang, Weiqiang Liu:
Building an accurate hardware Trojan detection technique from inaccurate simulation models and unlabelled ICs. 348-359
Volume 13, Number 5, 2019
- Malik Imran, Muhammad Rashid, Atif Raza Jafri, Muhammad Kashif:
Throughput/area optimised pipelined architecture for elliptic curve crypto processor. 361-368 - Irith Pomeranz:
Updating the sets of target faults during test generation for multiple fault models. 369-375 - Arezoo Dabaghi, Hamed Farbeh:
High performance and predictable memory controller for multicore mixed-criticality real-time systems. 376-382 - Tanusree Kaibartta, Chandan Giri, Hafizur Rahaman, Debesh Kumar Das:
Approach of genetic algorithm for power-aware testing of 3D IC. 383-396 - Yi Wang, Karim Shahbazi, Hao Zhang, Kwang-Il Oh, Jae-Jin Lee, Seok-Bum Ko:
Efficient spiking neural network training and inference with reduced precision memory and computing. 397-404 - Anuar Jaafar, Norhayati Soin, Sharifah Wan Muhamad Hatta, Sani Irwan Md. Salim:
Delay performance due to thermal variation on field-programmable gate array via the adoption of a stable ring oscillator. 405-413
Volume 13, Number 6, 2019
- Guest Editorial: Energy-efficient Computing for Embedded and IoT Devices. 415-416
- Dipika Deb, John Jose, Maurizio Palesi:
ECAP: energy-efficient caching for prefetch blocks in tiled chip multiprocessors. 417-428 - Sumanta Pyne:
Scheduling of dual supercapacitor for longer battery lifetime in safety-critical embedded systems with power gating. 429-442 - James Clay, Naveena Elango, Sheena Ratnam Priya, Shixiong Jiang, Ramalingam Sridhar:
Energy-efficient and reliable in-memory classifier for machine-learning applications. 443-452 - Biswajit Mishra, Sanket Thakkar, Nupur Jain:
Ultra-low power digital front-end for single lead ECG acquisition integrated with a time-to-digital converter. 453-460 - Jinti Hazarika, Mohd. Tasleem Khan, Shaik Rafi Ahamed, Harshal B. Nemade:
Energy efficient VLSI architecture of real-valued serial pipelined FFT. 461-469 - Sanjay Moulik, Rajesh Devaraj, Arnab Sarkar:
HEALERS: a heterogeneous energy-aware low-overhead real-time scheduler. 470-480 - Khushboo Rani, Hemangee K. Kapoor:
Write-variation aware alternatives to replace SRAM buffers with non-volatile buffers in on-chip interconnects. 481-492 - Sumana Ghosh, Soumyajit Dey, Pallab Dasgupta:
Performance and energy aware robust specification of control execution patterns under dropped samples. 493-504 - Pramod Kumar Bharti, Neelam Surana, Joycee Mekie:
Hetro8T: power and area efficient approximate heterogeneous 8T SRAM for H.264 video decoder. 505-513 - Somdip Dey, Amit Kumar Singh, Klaus Dieter McDonald-Maier:
P-EdgeCoolingMode: an agent-based performance aware thermal management unit for DVFS enabled heterogeneous MPSoCs. 514-523 - Spandana Rachamalla, Shashidhar Reddy, Arun Joseph:
Heterogeneity aware power abstractions for dynamic power dominated FinFET-based microprocessors. 524-531 - Vitor Ferreira Torres, Frank Sill Torres:
Resilient training of neural network classifiers with approximate computing techniques for hardware-optimised implementations. 532-542
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