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ORCIDDesign Automation for Embedded Systems, Volume 16
Volume 16, Number 1, March 2012
- Bruno C. Albertini
, Sandro Rigo, Guido Araujo:
Computational reflection and its application to platform verification. 1-17 - Elena Maftei, Paul Pop, Jan Madsen:
Routing-based synthesis of digital microfluidic biochips. 19-44 - Andrzej Ruta, Robert Brzoza-Woch, Krzysztof Zielinski:
On fast development of FPGA-based SOA services - machine vision case study. 45-69
Volume 16, Number 2, June 2012
- Bertrand Le Gal, Lilian Bossuet:
Automatic low-cost IP watermarking technique based on output mark insertions. 71-92 - Vaibhav Jain, Anshul Kumar, Preeti Ranjan Panda:
Exploiting UML based validation for compliance checking of TLM 2 based models. 93-113 - Nicola Bombieri, Franco Fummi, Valerio Guarnieri, Francesco Stefanni, Sara Vinco:
HDTLib: an efficient implementation of SystemC data types for fast simulation at different abstraction levels. 115-135 - Calin Glitia, Julien DeAntoni, Frédéric Mallet, Jean-Vivien Millo, Pierre Boulet, Abdoulaye Gamatié:
Progressive and explicit refinement of scheduling for multidimensional data-flow applications using uml marte. 137-169
Volume 16, Number 3, September 2012
- Rauf Salimi Khaligh, Martin Radetzki:
Semantics and efficient simulation of accuracy-adaptive TLMs. 1-29 - Wim Meeus, Kristof Van Beeck, Toon Goedemé, Jan Meel, Dirk Stroobandt:
An overview of today's high-level synthesis tools. 31-51 - Elvinia Riccobene, Patrizia Scandurra:
Integrating the SysML and the SystemC-UML profiles in a model-driven embedded system design flow. 53-91 - Gilberto Ochoa-Ruiz, Ouassila Labbani, El-Bay Bourennane, Philippe Soulard, Sana Cherif:
A high-level methodology for automatically generating dynamic partially reconfigurable systems using IP-XACT and the UML MARTE profile. 93-128 - Fernando Herrera, Íñigo Ugarte, Eugenio Villar:
Towards automated implementation of adaptive systems from abstract SystemC specifications - From SystemC adaptive processes to embedded software and to synthesizable hardware descriptions. 129-160
Volume 16, Number 4, November 2012
- Majdi Elhaji, Pierre Boulet, Abdelkrim Zitouni, Samy Meftali, Jean-Luc Dekeyser, Rached Tourki:
System level modeling methodology of NoC design from UML-MARTE to VHDL. 161-187 - Jia Huang, Andreas Raabe, Kai Huang, Christian Buckl, Alois C. Knoll:
A framework for reliability-aware design exploration on MPSoC based systems. 189-220 - Kiran Kumar Anumandla, Rangababu Peesapati, Samrat L. Sabat, Siba K. Udgata:
SoC based floating point implementation of differential evolution algorithm using FPGA. 221-240 - Yared Hailu Gudeta, Se Jin Kwon, Eun-Sun Cho, Tae-Sun Chung:
Probability-based static wear-leveling algorithm for block and hybrid-mapping NAND flash memory. 241-264 - Adrian Lizarraga, Lu Ding, Jeff Hiner, Roman Lysecky, Susan Lysecky, Ann Gordon-Ross:
ATLeS-SN. 265-291 - Young-Pyo Joo, Sungchan Kim, Soonhoi Ha:
Efficient hierarchical bus-matrix architecture exploration of processor pool-based MPSoC. 293-317 - Muhammad Rashid, Bernard Pottier:
Visitor-based application analysis methodology for early design space exploration. 319-338 - Iraklis Anagnostopoulos, Alexandros Bartzas, Iasonas Filippopoulos, Dimitrios Soudris:
High-level customization framework for application-specific NoC architectures. 339-361 - Manel Hentati, Samya Elaoud, Yassine Aoudni, Jean-François Nezan, Mohamed Abid:
An efficient Resource Management to optimize the placement of hardware task on FPGA in the RVC framework. 363-380
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