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ORCIDICSAMOS 2013: Samos, Greece
- 2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2013, Agios Konstantinos, Samos Island, Greece, July 15-18, 2013. IEEE 2013
- Wen-mei W. Hwu:
Rethinking computer architecture for throughput computing. - Andras Vajda:
What cloud computing can teach us about embedded many-core programming? - André Seznec:
Faster unicores are still needed.
GPU-andFFT-Architectures
- Arian Maghazeh, Unmesh D. Bordoloi, Petru Eles, Zebo Peng:
General purpose computing on low-power embedded GPUs: Has it come of age? 1-10 - Ugljesa Milic, Isaac Gelado, Nikola Puzovic, Alex Ramírez, Milo Tomasevic:
Parallelizing general histogram application for CUDA architectures. 11-18 - Deepak Revanna, Omer Anjum, Manuele Cucchi, Roberto Airoldi, Jari Nurmi
:
A scalable FFT processor architecture for OFDM based communication systems. 19-27 - Tomasz Patyk, David Guevorkian, Teemu Pitkänen, Pekka Jääskeläinen, Jarmo Takala:
Low-power application-specific FFT processor for LTE applications. 28-32
Modelling and Design Space Exploration
- Julien Ouy, Matthew Kracht, Sandeep K. Shukla:
Abstraction of polychronous dataflow specifications into mode-automata. 33-40 - Karol Desnos, Maxime Pelcat, Jean-François Nezan, Shuvra S. Bhattacharyya, Slaheddine Aridhi:
PiMM: Parameterized and Interfaced dataflow Meta-Model for MPSoCs runtime reconfiguration. 41-48 - Marco Lattuada, Fabrizio Ferrandi:
Modeling pipelined application with Synchronous Data Flow graphs. 49-55 - Oliver Jakob Arndt, Daniel Becker, Christian Banz, Holger Blume:
Parallel implementation of real-time semi-global matching on embedded multi-core architectures. 56-63
SystemC and Simulation of Embedded Systems
- Yanyan Gao, Xi Li:
An effective model extraction method with state space compression for model checking SystemC TLM designs. 64-71 - Efstathios Sotiriou-Xanthopoulos, Kostas Siozios, George Economakos, Dimitrios Soudris:
A Process-based Reconfigurable SystemC Module for simulation speedup. 72-79 - Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Muhammad Irfan Uddin, Chris R. Jesshope:
MGSim - A simulation environment for multi-core research and education. 80-87 - Christopher Thompson, Miles Gould, Nigel P. Topham:
High speed cycle approximate simulation for cache-incoherent MPSoCs. 88-95
Energy-Awareness and Low Power
- Tero Rintaluoma, Olli Silvén:
Lightweight resource estimation model to extend battery life in video playback. 96-103 - Syed M. A. H. Jafri, Muhammad Adeel Tajammul, Ahmed Hemani, Kolin Paul, Juha Plosila, Hannu Tenhunen:
Energy-aware-task-parallelism for efficient dynamic voltage, and frequency scaling, in CGRAs. 104-112 - Andrea Mineo, Maurizio Palesi, Giuseppe Ascia, Vincenzo Catania:
NoC links energy reduction through link voltage scaling. 113-120
Applications on Embedded Architectures
- Holger Flatt, Jürgen Jasperneite, Daniel Dennstedt, Tran Dinh Hung:
Mapping of PRP/HSR redundancy protocols onto a configurable FPGA/CPU based architecture. 121-128 - Christos Kyrkou, Theocharis Theocharides, Christos-Savvas Bouganis:
An embedded hardware-efficient architecture for real-time cascade Support Vector Machine classification. 129-136 - Isabelle Texier, Pierre R. Marcoux, Pascale Pham, Marie Muller, Pierre-Yves Benhamou, Marc Correvon, Gabriela Dudnik, Guy Voirin, Natascha Bue, Jan Cristensen, Massimo Laurenza, Giuseppe Gazzara, Andreas Raptopoulos, Alexandros Bartzas, Dimitrios Soudris, Carl Saxby, Thierry Navarro, Fabio Di Francesco, Pietro Salvo, Marco Romanelli, Battistino Paggi, Leonidas Lymperopoulos:
SWAN-iCare: A smart wearable and autonomous negative pressure device for wound monitoring and therapy. 137-144
SOCs and Array Processors
- Balaji Raman, Ayoub Nouri, Deepak Gangadharan, Marius Bozga, Ananda Basu, Mayur Maheshwari, Axel Legay, Saddek Bensalem, Samarjit Chakraborty:
Stochastic modeling and performance analysis of multimedia SoCs. 145-154 - Steven D. Feldman, Pierre LaBorde, Damian Dechev:
Concurrent multi-level arrays: Wait-free extensible hash maps. 155-163 - Dimitris Theodoropoulos, Polyvios Pratikakis, Dionisios N. Pnevmatikatos:
Efficient runtime support for embedded MPSoCs. 164-171
Modelling, Mapping, and Scheduling
- James Harbin, Leandro Soares Indrusiak:
Fast transaction-level dynamic power consumption modelling in priority preemptive wormhole switching networks on chip. 172-179 - Spiros N. Agathos, Vassilios V. Dimakopoulos, Aggelos Mourelis, Alexandros Papadogiannakis:
Deploying OpenMP on an embedded multicore accelerator. 180-187 - Ricardo S. Ferreira, Vinicius Duarte, Waldir Meireles, Monica Magalhães Pereira, Luigi Carro, Stephan Wong:
A just-in-time modulo scheduling for virtual coarse-grained reconfigurable architectures. 188-195 - Lars Middendorf, Christian Zebelein, Christian Haubelt:
Dynamic task mapping onto multi-core architectures through stream rewriting. 196-204 - Jelena Spasic, Todor P. Stefanov:
An accurate energy model for streaming applications mapped on MPSoC platforms. 205-212
Fault-Modeling and Test
- Alireza Rohani, Hans G. Kerkhoff, Enrico Costenaro, Dan Alexandrescu:
Pulse-length determination techniques in the rectangular single event transient fault model. 213-218 - Ghazaleh Nazarian, Robert M. Seepers, Christos Strydis, Georgi Gaydadjiev:
Compiler-aided methodology for low overhead on-line testing. 219-226
Manycore Architectures
- Anshuman Gupta, Jack Sampson, Michael Bedford Taylor:
TimeCube: A manycore embedded processor with interference-agnostic progress tracking. 227-236 - José L. Abellán, Alberto Ros, Juan Fernández Peinador, Manuel E. Acacio:
ECONO: Express coherence notifications for efficient cache coherency in many-core CMPs. 237-244
Fault-Tolerant Techniques for Computer Systems, Architectures and Processors
- Ioannis Sourdis:
Special session on "Fault-tolerant techniques for computer systems, architectures and processors". 245 - Ioannis Sourdis:
on-Demand system reliability: The DeSyRe project. 246 - Andrea Pellegrini, Valeria Bertacco:
Cobra: A comprehensive bundle-based reliable architecture. 247-254 - Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang:
On-demand thread-level fault detection in a concurrent programming environment. 255-262 - David Defour, Eric Petit:
GPUburn: A system to test and mitigate GPU hardware failures. 263-270 - Ronak Shah, Minsu Choi, Byunghyun Jang:
Workload-dependent relative fault sensitivity and error contribution factor of GPU onchip memory structures. 271-278
Exposed Data Path Architectures: Recent Advances and Applications
- Jani Boutellier, Pekka Jääskeläinen:
Special session on "Exposed data path architectures: Recent advances and applications". 279 - George Matheou, Paraskevas Evripidou:
Verilog-based simulation of hardware support for data-flow concurrency on multicore systems. 280-287 - Shahriar Shahabuddin, Janne Janhunen, Muhammet Fatih Bayramoglu, Markku J. Juntti, Amanullah Ghazi, Olli Silvén:
Design of a unified transport triggered processor for LDPC/turbo decoder. 288-295 - Daniel Bates, Alex Bradbury, Andreas Koltes, Robert D. Mullins:
Exploiting tightly-coupled cores. 296-305 - Magnus Själander, Per Larsson-Edefors:
FlexCore: Implementing an exposed datapath processor. 306-313 - Catalin Bogdan Ciobanu, Georgi Gaydadjiev, Christian Pilato, Donatella Sciuto:
Dataflow computing with Polymorphic Registers. 314-321 - Dongrui She, Yifan He, Luc Waeijen, Henk Corporaal:
OpenCL code generation for low energy wide SIMD architectures with explicit datapath. 322-329 - Luc Waeijen, Dongrui She, Henk Corporaal, Yifan He:
SIMD made explicit. 330-337
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