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ORCID12th HEART 2022: Tsukuba, Japan
- HEART 2022: International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, Tsukuba, Japan, June 9 - 10, 2022. ACM 2022, ISBN 978-1-4503-9660-8
- Kaijie Wei, Yuki Kuno, Masatoshi Arai, Hideharu Amano:
RT-libSGM: An Implementation of a Real-time Stereo Matching System on FPGA. 1-9 - Yuka Sano, Ryohei Kobayashi
, Norihisa Fujita, Taisuke Boku:
Performance Evaluation on GPU-FPGA Accelerated Computing Considering Interconnections between Accelerators. 10-16 - Qianzhou Wang, Yat Wong, Zhiqiang Que, Wayne Luk:
Verifying Hardware Optimizations for Efficient Acceleration. 17-23 - Keisuke Kamahori, Shinya Takamaeda-Yamazaki:
Accelerating Decision Tree Ensemble with Guided Branch Approximation. 24-32 - Christian Maximilian Karle, Marius Kreutzer, Johannes Pfau, Jürgen Becker:
A hardware/software co-design approach to prototype 6G mobile applications inside the GNU Radio SDR Ecosystem using FPGA hardware accelerators. 33-41 - Jessica Vandebon, José Gabriel F. Coutinho, Wayne Luk:
Meta-Programming Design-Flow Patterns for Automating Reusable Optimisations. 42-50 - Luc Forget, Gauthier Harnisch, Ronan Keryell, Florent de Dinechin:
A single-source C++20 HLS flow for function evaluation on FPGA and beyond. 51-58 - Mouad Rifai, Lennart Johnsson:
Memory and Energy Efficient Memory Model and Instruction Set Architectures for Tree Data Structures. 59-68 - Tatsuma Mori, Daiki Furukawa, Keigo Motoyoshi, Haruto Ikehara, Kaito Ohira, Taito Manabe, Yuichiro Shibata, Tomohiro Ueno, Kentaro Sano:
Stream Computation of 3D Approximate Convex Hulls with an FPGA. 69-75 - Ryuichi Sakamoto, Yuriko Ezaki, Masaaki Kondo:
Hash Distributed A* on an FPGA. 76-83 - Andrew Brown, Tim Todman, Wayne Luk, David B. Thomas, Mark Vousden, Graeme M. Bragg, Jonny Beaumont, Simon W. Moore, Alex Yakovlev, Ashur Rafiev:
Non-deterministic event brokered computing. 84-86 - Mostafa Koraei, Petter Lefoka:
A Novel Scalable Decision Tree Implementation on SoC Based FPGAs. 87-89 - Tomohiro Ueno, Takaaki Miyajima, Kentaro Sano:
FPGA-Dedicated Network vs. Server Network for Pipelined Computing with Multiple FPGAs. 90-91 - Satoshi Kaneko, Hiroyuki Takizawa, Kentaro Sano:
A SYCL-based high-level programming framework for HPC programmers to use remote FPGA clusters. 92-94 - Mark Klaisoongnoen, Nick Brown, Oliver Thomson Brown:
Low-power option Greeks: Efficiency-driven market risk analysis using FPGAs. 95-101 - Radhit Dedania, Sang-Woo Jun:
Very Low Power High-Frequency Floating Point FPGA PID Controller. 102-107 - Yoshiki Kunimoto, Tsutomu Maruyama:
Object Detection and Tracking using CouNT and Motion Vectors on FPGA. 108-111 - Alessio Carpegna, Stefano Di Carlo, Alessandro Savino:
Artificial Resilience in neuromorphic systems. 112-114
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