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ORCID26th COOL CHIPS 2023: Tokyo, Japan
- IEEE Symposium in Low-Power and High-Speed Chips, COOL CHIPS 2023, Tokyo, Japan, April 19-21, 2023. IEEE 2023, ISBN 979-8-3503-3201-8
- Genta Inoue, Daiki Okonogi, Thiem Van Chu, Jaehoon Yu, Masato Motomura, Kazushi Kawamura:
Flexibly Controllable Dynamic Cooling Methods for Solid-State Annealing Processors to Improve Combinatorial Optimization Performance. 1-3 - Takeshi Ohkawa, Masahiro Aoyagi:
FPGA Emulation of Through-Silicon-Via (TSV) Dataflow Network for 3D Standard Chip Stacking System. 1-3 - Jinsung Yoon, Donghyun Lee, Neungyun Kim, Su-Jung Lee, Gil-Ho Kwak, Tae-Hwan Kim:
A Real-Time Keyword Spotting System Based on an End-To-End Binary Convolutional Neural Network in FPGA. 1-3 - Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Jiwon Choi
, Hoi-Jun Yoo:
COOL-NPU: Complementary Online Learning Neural Processing Unit with CNN-SNN Heterogeneous Core and Event-driven Backpropagation. 1-3 - Viktor Razilov, Juncen Zhong, Emil Matús, Gerhard P. Fettweis:
Dual Vector Load for Improved Pipelining in Vector Processors. 1-6 - Tatsuya Kubo, Shinya Takamaeda-Yamazaki:
Cachet: A High-Performance Joint-Subtree Integrity Verification for Secure Non-Volatile Memory. 1-6 - Anawin Opasatian, Makoto Ikeda:
Lookup Table Modular Reduction: A Low-Latency Modular Reduction for Fast ECC Processor. 1-6 - Tobias Kaiser, Friedel Gerfers:
A 2.41-μW/MHz, 437-PE/mm2 CGRA in 22 nm FD-SOI With RISC-Like Code Generation. 1-6 - Infall Syafalni, Mohamad Imam Firdaus, Andi M. Riyadhus Ilmy, Nana Sutisna, Trio Adiono:
MazeCov-Q: An Efficient Maze-Based Reinforcement Learning Accelerator for Coverage. 1-6 - Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Jongjun Park, Hoi-Jun Yoo:
A Low-power Neural 3D Rendering Processor with Bio-inspired Visual Perception Core and Hybrid DNN Acceleration. 1-3 - Ziquan Qin, Kaijie Wei, Hideharu Amano, Kazuhiro Nakadai:
Low power implementation of Geometric High-order Decorrelation-based Source Separation on an FPGA board. 1-6
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