• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 17 matches

• 1997
• 
  Allan H. Anderson, Gary A. Shaw:
  Executable Requirements and Specifications. J. VLSI Signal Process. 15(1-2): 49-61 (1997)
• 
  J. Scott Calhoun, Vijay K. Madisetti, Robert B. Reese, Thomas Egolf:
  Developing and Distributing Component-Level VHDL Models. J. VLSI Signal Process. 15(1-2): 111-126 (1997)
• 
  Wan-Teh Chang, Soonhoi Ha, Edward A. Lee:
  Heterogeneous Simulation - Mixing Discrete-Event Models with Dataflow. J. VLSI Signal Process. 15(1-2): 127-144 (1997)
• 
  Geoffrey A. Frank, Bernard Clark, W. Bernard Schaming, William Kline:
  Hardware/Software Codesign from the RASSP Perspective. J. VLSI Signal Process. 15(1-2): 63-81 (1997)
• 
  Chen-Yi Lee, Mei-Cheng Lu:
  An Efficient VLSI Architecture for Full-Search Block Matching Algorithms. J. VLSI Signal Process. 15(3): 275-282 (1997)
• 
  M. C. Mekhallalati, Ahmed S. Ashur, M. K. Ibrahim:
  Novel Radix Finite Field Multiplier for GF(2^m). J. VLSI Signal Process. 15(3): 233-245 (1997)
• 
  S. Hamid Nawab, Alan V. Oppenheim, Anantha P. Chandrakasan, Joseph M. Winograd, Jeffrey T. Ludwig:
  Approximate Signal Processing. J. VLSI Signal Process. 15(1-2): 177-200 (1997)
• 
  Massoud Pedram, Hirendu Vaishnav:
  Power Optimization in VLSI Layout: A Survey. J. VLSI Signal Process. 15(3): 221-232 (1997)
• 
  Jeff Pridmore, Greg Buchanan, Gerry Caracciolo, Janet Wedgwood:
  Model-Year Architectures for Rapid Prototyping. J. VLSI Signal Process. 15(1-2): 83-96 (1997)
• 
  Mark A. Richards, Anthony Gadient, Geoffrey A. Frank, Randolph Harr:
  The RASSP Program: Origin, Concepts, and Status: An Introduction to the Issue. J. VLSI Signal Process. 15(1-2): 7-27 (1997)
• 
  Fred Rose, John Shackleton, Carl Hein:
  Performance Modeling of System Architectures. J. VLSI Signal Process. 15(1-2): 97-109 (1997)
• 
  James E. Saultz:
  Rapid Prototyping of Application-Specific Signal Processors (RASSP) In-Progress Report. J. VLSI Signal Process. 15(1-2): 29-47 (1997)
• 
  Larry Scanlan, Wing Lee, Mike Vahey, Mike McCollough:
  RASSP Methodology Evaluation and Lessons Learned Developing IRST Signal Processor. J. VLSI Signal Process. 15(1-2): 145-160 (1997)
• 
  Sundararajan Sriram, Edward A. Lee:
  Determining the Order of Processor Transactions in Statically Scheduled Multiprocessors. J. VLSI Signal Process. 15(3): 207-220 (1997)
• 
  Chua-Chin Wang, Chih-Lwan Fan:
  Digital Design of Discrete Exponential Bidirectional Associative Memory. J. VLSI Signal Process. 15(3): 247-257 (1997)
• 
  John Welsh, Bipin Chadha, Biju Kalathil, Peter Holmes, Mary Catherine Tuck, William Selvidge, Elisa Finnie, Lynwood Hines:
  RASSP Enterprise Technologies for Signal Processor Life-Cycle Support. J. VLSI Signal Process. 15(1-2): 161-176 (1997)
• 
  Karl-Heinz Zimmermann, Wolfgang Achtziger:
  Finding Space-Time Transformations for Uniform Recurrences via Branching Parametric Linear Programming. J. VLSI Signal Process. 15(3): 259-274 (1997)