• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 19 matches

• 1995
• 
  Francisco Argüello, Emilio L. Zapata:
  Constant geometry split-radix algorithms. J. VLSI Signal Process. 10(2): 141-152 (1995)
• 
  Mark J. Bentum, Martin M. Samsom, Cornelis H. Slump:
  A multi-ASIC real-time implementation of the two dimensional affine transform with a bilinear interpolation scheme. J. VLSI Signal Process. 10(3): 261-273 (1995)
• 
  Giuseppe Caire, Javier Ventura-Traveset, M. Hollreiser, Ezio Biglieri:
  Systolic architecture for the VLSI implementation of high-speed staged decoders/quantizers. J. VLSI Signal Process. 10(2): 153-168 (1995)
• 
  Liang-Fang Chao, Edwin Hsing-Mean Sha:
  Static scheduling for synthesis of DSP algorithms on various models. J. VLSI Signal Process. 10(3): 207-223 (1995)
• 
  Ling Chen, Henry Y. H. Chuang:
  Designing systolic architectures for complete Euclidean distance transform. J. VLSI Signal Process. 10(2): 169-179 (1995)
• 
  Liang-Gee Chen, Yeu-Shen Jehng, Tzi-Dar Chiueh:
  Pipeline interleaving design for FIR, IIR, and FFT array processors. J. VLSI Signal Process. 10(3): 275-293 (1995)
• 
  Henry Y. H. Chuang, Ling Chen:
  VLSI architecture for fast 2D discrete orthonormal wavelet transform. J. VLSI Signal Process. 10(3): 225-236 (1995)
• 
  Mohammad Eshghi, Joanne DeGroat:
  A parallel binary structured LMS algorithm for transversal adaptive filters. J. VLSI Signal Process. 10(2): 127-140 (1995)
• 
  Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri:
  Area efficient computing structures for concurrent error detection in systolic arrays. J. VLSI Signal Process. 10(3): 237-260 (1995)
• 
  Farhad Fuad Islam, Keikichi Tamaru:
  High speed merged array multiplication. J. VLSI Signal Process. 10(1): 41-52 (1995)
• 
  Prashanth Kuchibhotla, Bhaskar D. Rao:
  A methodology for fast scheduling of partitioned systolic algorithms. J. VLSI Signal Process. 10(2): 111-126 (1995)
• 
  D. E. Metafas, Constantinos E. Goutis:
  A floating-point advanced cordic processor. J. VLSI Signal Process. 10(1): 53-65 (1995)
• 
  Randy S. Roberts, Herschel H. Loomis Jr.:
  Parallel computation structures for a class of cyclic spectral analysis algorithms. J. VLSI Signal Process. 10(1): 25-40 (1995)
• 
  Lothar Thiele:
  Resource constrained scheduling of uniform algorithms. J. VLSI Signal Process. 10(3): 295-310 (1995)
• 
  Alexandre S. de la Vega, Paulo S. R. Diniz, Antonio Carneiro de Mesquita Filho, Andreas Antoniou:
  A modular distributed-arithmetic implementation of the inner product and its application to digital filters. J. VLSI Signal Process. 10(1): 93-106 (1995)
• 
  Cheng-Wen Wu, Ming-Kwang Chang:
  Bit-level systolic arrays for finite-field multiplications. J. VLSI Signal Process. 10(1): 85-92 (1995)
• 
  Chung-Yu Wu, Ron-Yi Liu:
  CMOS current-mode implementation of spatiotemporal probabilistic neural networks for speech recognition. J. VLSI Signal Process. 10(1): 67-84 (1995)
• 
  Jingling Xue:
  Closed-form mapping conditions for the synthesis of linear processor arrays. J. VLSI Signal Process. 10(2): 181-199 (1995)
• 
  M. Yan, John V. McCanny, Yi Hu:
  VLSI architectures for vector quantization. J. VLSI Signal Process. 10(1): 5-23 (1995)