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Publication search results
found 52 matches
- 1991
- Rod Adams, Gordon B. Steven:
A parallel pipelined processor with conditional instruction execution. SIGARCH Comput. Archit. News 19(1): 135-142 (1991) - Fred S. Annexstein:
Fault tolerance in hypercube-derivative networks (preliminary version). SIGARCH Comput. Archit. News 19(1): 25-34 (1991) - Keith Anthony:
Book review: Technology Projection Modeling of Future Computer Systems by Al Cutaia (Prentice-Hall, 1990). SIGARCH Comput. Archit. News 19(1): 152-153 (1991) - Henry G. Baker:
Precise instruction scheduling without a precise machine model. SIGARCH Comput. Archit. News 19(6): 4-8 (1991) - Richard Beigel, Clyde P. Kruskal:
Processor networks and interconnection networks without long wires (extended abstract). SIGARCH Comput. Archit. News 19(1): 15-24 (1991) - Robert Bernecky:
Book review: Multiprocessors by Daniel Tabak (Prentice Hall, Englewood Cliffs, NJ). SIGARCH Comput. Archit. News 19(1): 154-156 (1991) - Robert Bernecky:
Book review: Multiprocessor Performance by Erol Gelenbe (J. Wiley & Sons, Chichester, England). SIGARCH Comput. Archit. News 19(1): 156-157 (1991) - Robert Bernecky:
Book review: Past, Present, Parallel: A Survey of Available Parallel Computing Systems by Arthur Trew & Greg Wilson (Eds.), (Springer-Verlag 1991). SIGARCH Comput. Archit. News 19(6): 24-25 (1991) - Thomas Beth, Volker Hatz:
A restricted crossbar implementation and its applications. SIGARCH Comput. Archit. News 19(6): 12-16 (1991) - Gianfranco Bilardi, Scot W. Hornick, Majid Sarrafzadeh:
Optimal VLSI architectures for multidimensional DFT (preliminary version). SIGARCH Comput. Archit. News 19(1): 45-52 (1991) - Jehoshua Bruck, Robert Cypher, Danny Soroker:
Running algorithms efficiently on faulty hypercubes (extended abstract). SIGARCH Comput. Archit. News 19(1): 89-96 (1991) - Thomas M. Conte, Wen-mei W. Hwu:
A brief survey of benchmark usage in the architecture community. SIGARCH Comput. Archit. News 19(4): 37-44 (1991) - Alberto R. Cunha, Carlos N. Ribeiro, José A. Marques:
The architecture of a memory management unit for object-oriented systems. SIGARCH Comput. Archit. News 19(4): 109-116 (1991) - Andrew J. DuBois, John Rasure:
Design and evaluation of a distributed asynchronous VLSI crossbar switch controller for a packet switched supercomputer network. SIGARCH Comput. Archit. News 19(4): 69-79 (1991) - Richard M. Fujimoto:
The virtual machine. SIGARCH Comput. Archit. News 19(1): 35-44 (1991) - John Fulcher:
Book review: Neural Net Applications and Products by Richard K. Miller, Terri C. Walker, and Anne M. Ryan (SEAl Technical Publications, 1990). SIGARCH Comput. Archit. News 19(1): 157-158 (1991) - John Fulcher:
Book review: The 68000 and 68020 Microprocessors: Hardware, Software and Interfacing Techniques by W. Triebel and A. Singh (Prentice Hall, 1991). SIGARCH Comput. Archit. News 19(5): 29-30 (1991) - Peter Grabienski:
FLIP-FLOP: a stack-oriented multiprocessing system. SIGARCH Comput. Archit. News 19(1): 120-127 (1991) - Martin C. Herbordt, Charles C. Weems, James C. Corbett:
Message-passing algorithms for a SIMD torus with coteries. SIGARCH Comput. Archit. News 19(1): 69-78 (1991) - Michael L. Hilton:
Book review: Systems Programming in Parallel Logic Languages by lan Foster (Prentice Hall, 1990). SIGARCH Comput. Archit. News 19(1): 151 (1991) - Vladimir G. Ivanovíc:
Book review: Computation Structures by Stephen A Ward and Robert H. Halstead, Jr. (MIT Press or McGraw-Hill, 1990). SIGARCH Comput. Archit. News 19(5): 27-29 (1991) - Thomas F. Knight Jr.:
Technologies for low latency interconnection switches. SIGARCH Comput. Archit. News 19(1): 61-68 (1991) - Smaragda Konstantinidou, Lawrence Snyder:
The chaos router: a practical application of randomization in network routing. SIGARCH Comput. Archit. News 19(1): 79-88 (1991) - Moshe Krieger:
Book review: Multiprocessors by D. Tabak (Prentice-Hall, 1990). SIGARCH Comput. Archit. News 19(5): 27-29 (1991) - Morihiro Kuga, Kazuaki J. Murakami, Shinji Tomita:
DSNS (dynamically-hazard-resolved statically-code-scheduled, nonuniform superscalar): yet another superscalar processor architecture. SIGARCH Comput. Archit. News 19(4): 14-29 (1991) - Phillip A. Laplante:
An improved conditional branching scheme for a single instruction computer architecture. SIGARCH Comput. Archit. News 19(4): 66-68 (1991) - Stanley E. Lass:
The compiler controlled pack cache and messaging. SIGARCH Comput. Archit. News 19(4): 80-85 (1991) - Frank Thomson Leighton:
Selected Papers from the Symposium on Parallel Algorithms and Architectures. SIGARCH Comput. Archit. News 19(1): 5 (1991) - Yeong-Chang Maa, Dhiraj K. Pradhan, Dominique Thiébaut:
Two economical directory schemes for large-scale cache coherent multiprocessors. SIGARCH Comput. Archit. News 19(5): 10 (1991) - Norman S. Matloff:
An argument against scalable cache coherency. SIGARCH Comput. Archit. News 19(4): 117-123 (1991)
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