• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 28 matches

• 2003
• 
  A. M. Awwad, Abdel Elah Al-Ayyoub, Mohamed Ould-Khaoua:
  On the topological properties of the arrangement-star network. J. Syst. Archit. 48(11-12): 325-336 (2003)
• 
  Hojung Cha, Jaewook Kim, Rhan Ha:
  Bandwidth constrained smoothing for multimedia streaming with scheduling support. J. Syst. Archit. 48(11-12): 353-366 (2003)
• 
  Nabanita Das, Bhargab B. Bhattacharya, Sergei L. Bezrukov:
  Permutation routing in optical MIN with minimum number of stages. J. Syst. Archit. 48(11-12): 311-323 (2003)
• 
  Tomaz Dobravec, Borut Robic, Janez Zerovnik:
  Permutation routing in double-loop networks: design and empirical evaluation. J. Syst. Archit. 48(13-15): 387-402 (2003)
• 
  Lieven Eeckhout, Koen De Bosschere:
  Quantifying behavioral differences between multimedia and general-purpose workloads. J. Syst. Archit. 48(6-7): 199-220 (2003)
• 
  Hossam M. A. Fahmy, Abu Bakr A. ElHefnawy:
  Methods for distributed unicast in hypercubes. J. Syst. Archit. 48(6-7): 193-198 (2003)
• 
  Javier García, Joaquín Entrialgo, Daniel F. García, José Luis Díaz, Francisco J. Suárez:
  PET, a software monitoring toolkit for performance analysis of parallel embedded applications. J. Syst. Archit. 48(6-7): 221-235 (2003)
• 
  Tsung-Chuan Huang, Liang-Cheng Shiu:
  Efficient communication sets generation for block-cyclic distribution on distributed-memory machines. J. Syst. Archit. 48(8-10): 255-265 (2003)
• 
  Mahmoud Méribout, Masato Motomura:
  New design methodology with efficient prediction of quality metrics for logic level design towards dynamic reconfigurable logic. J. Syst. Archit. 48(8-10): 285-310 (2003)
• 
  Hyo-Chang Nam, Jong Kim, Sung Je Hong, Sunggu Lee:
  Secure checkpointing. J. Syst. Archit. 48(8-10): 237-254 (2003)
• 
  Massimo Ravasi, Marco Mattavelli:
  High-level algorithmic complexity evaluation for system design. J. Syst. Archit. 48(13-15): 403-427 (2003)
• 
  Miquel A. Senar, Ana Ripoll, Ana Cortés, Emilio Luque:
  Clustering and reassignment-based mapping strategy for message-passing architectures. J. Syst. Archit. 48(8-10): 267-283 (2003)
• 
  Mohsen Sharifi, Behrouz Zolfaghari:
  Modeling and evaluating the time overhead induced by BER in COMA multiprocessors. J. Syst. Archit. 48(13-15): 377-385 (2003)
• 
  N. Sudha, Thambipillai Srikanthan, Babu Mailachalam:
  A VLSI architecture for 3-D self-organizing map based color quantization and its FPGA implementation. J. Syst. Archit. 48(11-12): 337-352 (2003)
• 
  Yeonghwan Tscha:
  Scheduling length for switching element disjoint multicasting in Banyan-type switching networks. J. Syst. Archit. 48(6-7): 175-191 (2003)
• 
  Hans Vandierendonck, Koen De Bosschere:
  Highly accurate and efficient evaluation of randomising set index functions. J. Syst. Archit. 48(13-15): 429-452 (2003)
• 
  Shlomo Weiss, Roman Tsikel:
  Approximate prefix coding for system-on-a-chip programs. J. Syst. Archit. 48(13-15): 367-375 (2003)
• 2002
• 
  Dimitris Bakalis, Emmanouil Kalligeros, Dimitris Nikolos, Haridimos T. Vergos, George Alexiou:
  On the design of low power BIST for multipliers with Booth encoding and Wallace tree summation. J. Syst. Archit. 48(4-5): 125-135 (2002)
• 
  Domenico Cotroneo, Nicola Mazzocca, Luigi Romano, Stefano Russo:
  Building a dependable system from a legacy application with CORBA. J. Syst. Archit. 48(1-3): 81-98 (2002)
• 
  Nathalie Drach, Jean-Luc Béchennec, Olivier Temam:
  Increasing hardware data prefetching performance using the second-level cache. J. Syst. Archit. 48(4-5): 137-149 (2002)
• 
  Ravishankar R. Iyer, Hu-Jun Wang, Laxmi N. Bhuyan:
  Design and analysis of static memory management policies for CC-NUMA multiprocessors. J. Syst. Archit. 48(1-3): 59-80 (2002)
• 
  Lech Józwiak, Adam Postula:
  Genetic engineering versus natural evolution: Genetic algorithms with deterministic operators. J. Syst. Archit. 48(1-3): 99-112 (2002)
• 
  Jae Ick Lee, Sung Wook Chun, Soon Ju Kang:
  Virtual prototyping of PLC-based embedded system using object model of target and behavior model by converting RLL-to-statechart directly. J. Syst. Archit. 48(1-3): 17-35 (2002)
• 
  Seungjong Lee, Ando Ki, In-Cheol Park, Chong-Min Kyung:
  Interface synthesis between software chip model and target board. J. Syst. Archit. 48(1-3): 49-57 (2002)
• 
  Samia Loucif, Mohamed Ould-Khaoua, Abdel Elah Al-Ayyoub:
  Hypermeshes: implementation and performance. J. Syst. Archit. 48(1-3): 37-47 (2002)
• 
  S. Theoharis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis, Adonios Thanailakis:
  A fast and accurate delay dependent method for switching estimation of large combinational circuits. J. Syst. Archit. 48(4-5): 113-124 (2002)
• 
  Lee-Ren Ton, Lung-Chung Chang, Chung-Ping Chung:
  An analytical POC stack operations folding for continuous and discontinuous Java bytecodes. J. Syst. Archit. 48(1-3): 1-16 (2002)
• 
  R. Venugopal, Y. N. Srikant:
  Scheduling expression trees for delayed-load architectures. J. Syst. Archit. 48(4-5): 151-173 (2002)