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  e.g., sig matches "SIGIR" as well as "signal"
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Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 166 matches

• 2019
• 
  Muhammad Bilal:
  Resource-efficient FPGA implementation of perspective transformation for bird's eye view generation using high-level synthesis framework. IET Circuits Devices Syst. 13(6): 756-762 (2019)
• 
  Sa'ed Abed, Bassam Jamil Mohd, Mohammad H. Al Shayeji:
  Implementation of speech feature extraction for low-resource devices. IET Circuits Devices Syst. 13(6): 863-872 (2019)
• 
  Kalpana Agrawal, Ritu Srivastava, S. S. Rajput:
  Analysing the TIPSP-based VOFET through transistor efficiency (g_m/I _D). IET Circuits Devices Syst. 13(2): 139-144 (2019)
• 
  Arash Ahmadi:
  High-power multi-octave laterally diffused metal-oxide-semiconductor power amplifier with resistive harmonic termination. IET Circuits Devices Syst. 13(8): 1125-1133 (2019)
• 
  Umer F. Ahmed, Muhammad Mansoor Ahmed, Qamar D. Memon:
  Non-linear compact model for FinFETs output characteristics. IET Circuits Devices Syst. 13(8): 1249-1254 (2019)
• 
  Basim Ahmad Alabsi, Mohammed Anbar, Selvakumar Manickam, Omar E. Elejla:
  DDoS attack aware environment with secure clustering and routing based on RPL protocol operation. IET Circuits Devices Syst. 13(6): 748-755 (2019)
• 
  Ersin Alaybeyoglu:
  Implementation of capacitor multiplier with cell-based variable transconductance amplifier. IET Circuits Devices Syst. 13(3): 267-272 (2019)
• 
  A. Anita Angeline, V. S. Kanchana Bhaaskaran:
  Design impacts of delay invariant high-speed clock delayed dual keeper domino circuit. IET Circuits Devices Syst. 13(8): 1134-1141 (2019)
• 
  Seyed Mahmoud Anisheh, Hamed Abbasizadeh, Hossein Shamsi, Chitra Dadkhah, Kang-Yoon Lee:
  84 dB DC-gain two-stage class-AB OTA. IET Circuits Devices Syst. 13(5): 614-621 (2019)
• 
  Mohan Appikonda, Dhanalakshmi Kaliaperumal:
  Modelling and control of dual input boost converter with voltage multiplier cell. IET Circuits Devices Syst. 13(8): 1267-1276 (2019)
• 
  Muhammad Awais, Anas Razzaq, Ashfaq Ahmed, Guido Masera:
  LDPC check node implementation using reversible logic. IET Circuits Devices Syst. 13(4): 443-455 (2019)
• 
  Sudipta Bardhan, Manodipan Sahoo, Hafizur Rahaman:
  Boltzmann transport equation-based semi-classical drain current model for bilayer GFET including scattering effects. IET Circuits Devices Syst. 13(4): 456-464 (2019)
• 
  Akram Bati, Patrick C. K. Luk, Samer Aldhaher, Chan H. See, Raed A. Abd-Alhameed, Peter S. Excell:
  Dynamic analysis model of a class E² converter for low power wireless charging links. IET Circuits Devices Syst. 13(3): 399-405 (2019)
• 
  Okan Zafer Batur, Naci Pekcokguler, Günhan Dündar, Mutlu Koca:
  Synchronisation free non-coherent on-off keying demodulation techniques. IET Circuits Devices Syst. 13(6): 843-847 (2019)
• 
  Disha Bhattacharjee, Bijoy Goswami, Dinesh Kumar Dash, Ayan Bhattacharya, Subir Kumar Sarkar:
  Analytical modelling and simulation of drain doping engineered splitted drain structured TFET and its improved performance in subduing ambipolar effect. IET Circuits Devices Syst. 13(6): 888-895 (2019)
• 
  Debdut Biswas, Tarun Kanti Bhattacharyya:
  Spur reduction architecture for multiphase fractional PLLs. IET Circuits Devices Syst. 13(8): 1169-1180 (2019)
• 
  Ria Bose, Jitendra Nath Roy:
  2D Surface potential and mobility modelling of doped/undoped symmetric double gate MOSFET. IET Circuits Devices Syst. 13(5): 571-575 (2019)
• 
  Nevena R. Brnovic, Igor Djurovic, Veselin N. Ivanovic, Marko Simeunovic:
  Hardware implementation of the quasi-maximum likelihood estimator core for polynomial phase signals. IET Circuits Devices Syst. 13(2): 131-138 (2019)
• 
  Bandi Venkata Chandan, Kaushal Nigam, Dheeraj Sharma:
  Approach on electrically doped TFET for suppression of ambipolar and improving RF performance. IET Circuits Devices Syst. 13(6): 787-792 (2019)
• 
  Yen-Jen Chang, Yu-Cheng Cheng, Yi-Fong Lin, Shao-Chi Liao, Chun-Hsiang Lai, Tung-Chi Wu:
  Imprecise 4-2 compressor design used in image processing applications. IET Circuits Devices Syst. 13(6): 848-856 (2019)
• 
  Chun-Ming Chang, Shu-Hui Tu, M. N. S. Swamy, Ahmed M. Soliman:
  Design of odd nth-order elliptic high-pass filters employing OTRAs. IET Circuits Devices Syst. 13(2): 174-184 (2019)
• 
  Chun-Ming Chang, Shu-Hui Tu, M. N. Srikanta Swamy, Ahmed M. Soliman:
  Analytical synthesis of elliptic voltage-mode even/odd-nth-order filter structures using DDCCs, FDCCIIs, and grounded capacitors and resistors. IET Circuits Devices Syst. 13(3): 279-291 (2019)
• 
  Joy Iong-Zong Chen:
  Integrated routing scheme and inverter switch to develop a mobile controlled energy saving system. IET Circuits Devices Syst. 13(1): 1-6 (2019)
• 
  Hao Chen, Xuefeng Hu, Yuanyuan Huang, Meng Zhang, Benbao Gao:
  Improved DC-DC converter topology for high step-up applications. IET Circuits Devices Syst. 13(1): 51-60 (2019)
• 
  Ravichandran Chinnappan, Premalatha Logamani, Rengaraj Ramasubbu:
  Fixed frequency integral sliding-mode current-controlled MPPT boost converter for two-stage PV generation system. IET Circuits Devices Syst. 13(6): 793-805 (2019)
• 
  Devarshi Mrinal Das, Amogh Vidwans, Abhishek Srivastava, Meraj Ahmad, Saujal Vaishnav, Sourya Dewan, Maryam Shojaei Baghini:
  Design and development of an Internet-of-Things enabled wearable ExG measuring system with a novel signal processing algorithm for electrocardiogram. IET Circuits Devices Syst. 13(6): 903-907 (2019)
• 
  Sumedha Dasgupta, Chandrima Mondal, Abhijit Biswas:
  Role of grooving angle of 14-nm-InAs channel quantum well MOSFETs in improving analogue/RF and linearity performance. IET Circuits Devices Syst. 13(8): 1292-1298 (2019)
• 
  Dinesh Kumar Dash, Priyanka Saha, Subir Kumar Sarkar:
  Analytical modelling of dielectric engineered strained dual-material double-gate-tunnelling field effect transistor. IET Circuits Devices Syst. 13(7): 1039-1048 (2019)
• 
  Prasun Datta, Shyamapada Mukherjee:
  Architecture-aware routability-driven placer for large-scale mixed-size designs. IET Circuits Devices Syst. 13(8): 1209-1220 (2019)
• 
  Debarati Dey, Pradipta Roy, Debashis De:
  Electronic enhancement effect of doped ferromagnetic material in biomolecular heterojunction switch. IET Circuits Devices Syst. 13(1): 79-90 (2019)

skipping 136 more matches