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Publication search results
found 48 matches
- 1991
- Mostafa I. H. Abd-El-Barr, H. Choy, A. K. Jain, R. J. Bolton:
A Comparative Study of Programmable Realization Techniques of Multi-Valued Multi-Threshold Functions. ISMVL 1991: 372-381 - Takafumi Aoki, Michitaka Kameyama, Tatsuo Higuchi:
Design of Interconnection-Free Biomolecular Computing System. ISMVL 1991: 173-180 - Robert J. Bignall:
A Non-Commutative Multiple-Valued Logic. ISMVL 1991: 49-54 - Ferdinand Börner, Lucien Haddad, Reinhard Pöschel:
A Note on Minimal Partial Clones. ISMVL 1991: 262-267 - Jon T. Butler, Kriss A. Schueller:
Worst Case Number of Terms in Symmetric Multiple-Valued Functions. ISMVL 1991: 94-101 - Young-hoon Chang, Jon T. Butler:
The Design of Current Mode CMOS Multiple-Valued Circuits. ISMVL 1991: 130-138 - Tzi-cker Chiueh:
Optimization of Fuzzy Logic Implementation. ISMVL 1991: 348-355 - K. Wayne Current, M. E. Hurlston:
A Bi-Directional Current-Mode CMOS Multiple-Valued Logic Memory Circuit. ISMVL 1991: 196-202 - T. Raju Damarla, Fiaz Hossain:
Spectral Techniques for Multiple-Valued Logic Circuits. ISMVL 1991: 340-346 - Gerhard W. Dueck, G. H. John van Rees:
On the Maximum Number of Implicants Needed to Cover a Multiple-Valued Logic Function Using Window Literals. ISMVL 1991: 280-286 - George Epstein, Helena Rasiowa:
Theory and Uses of Post Algebras of Order \omega+\omega\ast. Part II. ISMVL 1991: 248-254 - Lluís Godo, Francesc Esteva, Pere Garcia, Jaume Agustí-Cullell:
A Formal Semantical Approach to Fuzzy Logic. ISMVL 1991: 72-79 - Reiner Hähnle:
Uniform Notation of Tableau Rules for Multiple-Valued Logics. ISMVL 1991: 238-245 - Takahiro Hanyu, Tatsuo Higuchi:
A Floating-Gate-MOS-Based Multiple-Valued Associative Memory. ISMVL 1991: 24-31 - Takahiro Hanyu, Yasushi Kojima, Tatsuo Higuchi:
A Multiple-Valued Logic Artay VLSI Based on Two-Transistor Delta Literal Circuit and Its Application to Real-Time Reasoning Systems. ISMVL 1991: 16-23 - Yutaka Hata, Masaharu Yuhara, Fujio Miyawaki, Kazuharu Yamato:
On the Complexity of Enumerations for Multiple-Valued Kleenean Functions and Unate Functions. ISMVL 1991: 55-62 - Chia-Lun J. Hu:
Application of Multi-Zero Artificial Neural Network to the Design of an M-Valued Digital Multiplier. ISMVL 1991: 32-37 - Okihiko Ishizuka, Hiroshi Takarabe, Zheng Tang, Hiroki Matsumoto:
Synthesis of Current-Mode Pass Transistor Networks. ISMVL 1991: 139-146 - Shoji Kawahito, K. Mizuno, Tasuro Nakamura:
Multiple-Valued Current-Mode Arithmetic Circuits Based on Redundant Positive-Digit Number Representations. ISMVL 1991: 330-339 - Konrad Lei, Zvonko G. Vranesic:
On the Synthesis of 4-Valued Current Mode CMOS Circuits. ISMVL 1991: 147-155 - Caro Lucas, I. Burhan Türksen, Kenneth C. Smith:
A General-Purpose Inference Processor for Real-Time Intelligent Controllers Using Systolic Arrays. ISMVL 1991: 316-321 - Claudio Moraga:
A Decade of Spectral Techniques. ISMVL 1991: 182-188 - Neil V. Murray, Erik Rosenthal:
Improving Tableau Deductions in Multiple-Valued Logics. ISMVL 1991: 230-237 - Akira Nakamura:
Topological Soft Algebra for the S5-Modal Fuzzy Logic. ISMVL 1991: 80-84 - Eric Neufeld:
The Abnormality Predicate. ISMVL 1991: 218-224 - Yoshiteru Okura, Ryosaku Shimada, Toshiharu Hasegawa:
Quaternary Cyclic AN Codes for Burst Error Correction. ISMVL 1991: 102-109 - Ewa Orlowska:
Post Relation Algebras and Their Proof System. ISMVL 1991: 298-305 - Corina Reischer, Dan A. Simovici:
On the Implementation of Set-Valued Non-Boolean Switching Functions. ISMVL 1991: 166-172 - David C. Rine:
An Equational Logic Approach for Mapping Multiple-Valued Rule-Based Expert Systems into Hardware Specification Rules. ISMVL 1991: 308-315 - Côme Rozon, Hussein T. Mouftah:
Testability Analysis of CMOS Temary Circuits. ISMVL 1991: 158-165
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retrieved on 2024-11-22 19:05 CET from data curated by the dblp team
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