• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 28 matches

• 2016
• 
  Houssam Abbas, Zhihao Jiang, Kuk Jin Jang, Marco Beccani, Jackson Liang, Rahul Mangharam:
  High-level modeling for computer-aided clinical trials of medical devices. HLDVT 2016: 85-92
• 
  Jacob A. Abraham:
  Cross-layer resilience: are high-level techniques always better? HLDVT 2016: 78
• 
  Loïc Besnard, Thierry Gautier, Clément Guy, Paul Le Guernic, Jean-Pierre Talpin, Brian R. Larson, Etienne Borde:
  Formal semantics of behavior specifications in the architecture analysis and design language standard. HLDVT 2016: 30-39
• 
  Rosario Distefano, Nickolas Goncharenko, Franco Fummi, Rosalba Giugno, Gary D. Bader, Nicola Bombieri:
  SyQUAL: a platform for qualitative modelling and simulation of biological systems. HLDVT 2016: 155-161
• 
  Jörg Fickenscher, Oliver Reiche, Jens Schlumberger, Frank Hannig, Jürgen Teich:
  Modeling, programming and performance analysis of automotive environment map representations on embedded GPUs. HLDVT 2016: 70-77
• 
  Md. Ariful Islam, Qinsi Wang, Ramin M. Hasani, Ondrej Balun, Edmund M. Clarke, Radu Grosu, Scott A. Smolka:
  Probabilistic reachability analysis of the tap withdrawal circuit in caenorhabditis elegans. HLDVT 2016: 170-177
• 
  Prachi Joshi, Vedahari Narasimhan G., Haibo Zeng, Sandeep K. Shukla, Chung-Wei Lin, Huafeng Yu:
  Design space exploration for deterministic ethernet-based architecture of automotive systems. HLDVT 2016: 53-61
• 
  Mohamed O. Kayed, Mohamed Abdelsalam, Rafik Guindi:
  Synthesizable SVA protocol checker generation methodology based on TDML and VCD file formats. HLDVT 2016: 1-8
• 
  Mejid Kebaili, Jean-Christophe Brignone, Katell Morin-Allory:
  Clock domain crossing formal verification: a meta-model. HLDVT 2016: 136-141
• 
  Yusuke Kimura, Masahiro Fujita:
  Specification by existing design plus use-cases. HLDVT 2016: 40-45
• 
  Xian Li, Klaus Schneider:
  Control-flow guided clause generation for property directed reachability. HLDVT 2016: 17-24
• 
  Guantao Liu, Tim Schmidt, Rainer Dömer:
  A segment-aware multi-core scheduler for system C PDES. HLDVT 2016: 100-107
• 
  Michele Lora, Sara Vinco, Franco Fummi:
  A unifying flow to ease smart systems integration. HLDVT 2016: 113-120
• 
  Kasper Søe Luckow, Corina S. Pasareanu:
  Log2model: inferring behavioral models from log data. HLDVT 2016: 25-29
• 
  Eman El Mandouh, Amr G. Wassal:
  Estimation of formal verification cost using regression machine learning. HLDVT 2016: 121-127
• 
  Natasa Miskov-Zivanov, Paolo Zuliani, Qinsi Wang, Edmund M. Clarke, James R. Faeder:
  High-level modeling and verification of cellular signaling. HLDVT 2016: 162-169
• 
  Sebastian Reiter, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel:
  Fault injection ecosystem for assisted safety validation of automotive systems. HLDVT 2016: 62-69
• 
  Johannes Schreiner, Rainer Findenig, Wolfgang Ecker:
  Design centric modeling of digital hardware. HLDVT 2016: 46-52
• 
  Subarna Sinha, David L. Dill:
  Deciphering cancer biology using boolean methods. HLDVT 2016: 150-154
• 
  Xiaojun Sun, Priyank Kalla, Florian Enescu:
  Word-level traversal of finite state machines using algebraic geometry. HLDVT 2016: 142-149
• 
  Sarmad Tanwir, Michael S. Hsiao, Loganathan Lingappan:
  Hardware-in-the-loop model-less diagnostic test generation. HLDVT 2016: 128-135
• 
  Jason G. Tong, Marc Boule, Zeljko Zilic:
  Accelerating assertion assessment using GPUs. HLDVT 2016: 9-16
• 
  Prab Varma, Miroslav N. Velev:
  Welcome Message. HLDVT 2016: 1
• 
  Daniela De Venuto, Valerio Francesco Annese, Giovanni Mezzina, Michele Ruta, Eugenio Di Sciascio:
  Brain-computer interface using P300: a gaming approach for neurocognitive impairment diagnosis. HLDVT 2016: 93-99
• 
  Qinsi Wang, Edmund M. Clarke:
  Formal modeling of biological systems. HLDVT 2016: 178-184
• 
  Qinhao Wang, Yusuke Kimura, Masahiro Fujita:
  Automatically adjusting system level designs after RTL/gate-level ECO. HLDVT 2016: 108-112
• 
  Daniel Yunge, Sangyoung Park, Philipp H. Kindt, Graziano Pravadelli, Samarjit Chakraborty:
  Dynamic service synthesis and switching for medical IoT and ambient assisted living. HLDVT 2016: 79-84
• 
  IEEE International High Level Design Validation and Test Workshop, HLDVT 2016, Santa Cruz, CA, USA, October 7-8, 2016. IEEE 2016, ISBN 978-1-5090-4270-8 [contents]