• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 1,443 matches

• 2023
• 
  Sagheer Ahmed, Jayesh Ambulkar, Debabrata Mondal, Ambika Prasad Shah:
  Soft Error Immune with Enhanced Critical Charge SIC14T SRAM Cell for Avionics Applications. VLSI-SoC 2023: 1-6
• 
  Walaa Amer, Mariam Rakka, Rachid Karami, Minjun Seo, Mazen A. R. Saghir, Rouwaida Kanj, Fadi J. Kurdahi:
  Hardware Implementation and Evaluation of an Information Processing Factory. VLSI-SoC 2023: 1-6
• 
  Can Ayduman, Emre Koçer, Selim Kirbiyik, Ahmet Can Mert, Erkay Savas:
  Efficient Design-Time Flexible Hardware Architecture for Accelerating Homomorphic Encryption. VLSI-SoC 2023: 1-7
• 
  Hassen Aziza, Cristian Zambelli, Said Hamdioui, Sumit Diware, Rajendra Bishnoi, Anteneh Gebregiorgis:
  On the Reliability of RRAM-Based Neural Networks. VLSI-SoC 2023: 1-8
• 
  Rassul Bairamkulov, Alessandro Tempia Calvino, Giovanni De Micheli:
  Synthesis of SFQ Circuits with Compound Gates. VLSI-SoC 2023: 1-6
• 
  Kais Belwafi, Hamdan Alshamsi, Ashfaq Ahmed, Abdulhadi Shoufan:
  Zero-Trust Communication between Chips. VLSI-SoC 2023: 1-5
• 
  Paolo Bernardi, Giorgio Insinga, Nima Kolahimahmoudi:
  A Novel Approach to Extract Embedded Memory Design Parameter Through Irradiation Test. VLSI-SoC 2023: 1-6
• 
  Giovani Britton, Salvador Mir, Estelle Lauga-Larroze, Benjamin Dormieu, Quentin Berlingard, Mikaël Cassé, Philippe Galy:
  Noise modeling using look-up tables and DC measurements for cryogenic applications. VLSI-SoC 2023: 1-6
• 
  Hanning Chen, Yeseong Kim, Elaheh Sadredini, Saransh Gupta, Hugo Latapie, Mohsen Imani:
  Sparsity Controllable Hyperdimensional Computing for Genome Sequence Matching Acceleration. VLSI-SoC 2023: 1-6
• 
  Yi Chen, Jie Lou, Christian Lanius, Florian Freye, Johnson Loh, Tobias Gemmeke:
  An Energy-Efficient and Area-Efficient Depthwise Separable Convolution Accelerator with Minimal On-Chip Memory Access. VLSI-SoC 2023: 1-6
• 
  Shan-Hui Chou, Ting-Yun Hsiao, Jing-Yang Jou, Juinn-Dar Huang:
  An Evaluation and Architecture Exploration Engine for CNN Accelerators through Extensive Dataflow Analysis. VLSI-SoC 2023: 1-6
• 
  A. Datsuk, P. Ostrovskyy, F. Vater, C. Wieden:
  Towards Robust Process Design Kits with a Scalable DevOps Quality Assurance Platform. VLSI-SoC 2023: 1-6
• 
  Suman Deb, Anupam Chattopadhyay, Avi Mendelson:
  A RISC-V SoC with Hardware Trojans: Case Study on Trojan-ing the On-Chip Protocol Conversion. VLSI-SoC 2023: 1-6
• 
  Grégoire Eggermann, Marco Rios, Giovanni Ansaloni, Sani R. Nassif, David Atienza:
  A 16-bit Floating-Point Near-SRAM Architecture for Low-power Sparse Matrix-Vector Multiplication. VLSI-SoC 2023: 1-6
• 
  Aishwarya Gupta, N. S. Aswathy, Hemangee K. Kapoor:
  Look before you leap: An Access-based Prudent Page Migration for Hybrid Memories. VLSI-SoC 2023: 1-6
• 
  Hala Ibrahim, Haytham Azmi, M. Watheq El-Kharashi, Mona Safar:
  Hardware Security Analysis of Arbiters: Trojan Modeling and Formal Verification. VLSI-SoC 2023: 1-6
• 
  Shahid Jamil, Muhammad Usman, Muhammad Jawad Shakil, Jafar Hussain, Rashad Ramzan:
  Bi-Directional Time Domain Duplexing (TDD) Amplifier for 5G Applications. VLSI-SoC 2023: 1-6
• 
  Jingbo Jiang, Xizi Chen, Chi-Ying Tsui:
  Accelerating Large Kernel Convolutions with Nested Winograd Transformation. VLSI-SoC 2023: 1-6
• 
  Dheemanth Joshi, Aniket Arun Gangotri, Sai Pranay Chennamsetti, Gautham Bolar, Ganesan Thiagarajan, Sanjeev Gurugopinath:
  A Two-Layer Connected Component Algorithm for Target Extraction Using K-means and Morphology. VLSI-SoC 2023: 1-6
• 
  Foroozan Karimzadeh, Mohsen Imani, Bahar Asgari, Ningyuan Cao, Yingyan Lin, Yan Fang:
  Memory-Based Computing for Energy-Efficient AI: Grand Challenges. VLSI-SoC 2023: 1-8
• 
  Rupesh Raj Karn, Kashif Nawaz, Ibrahim Abe M. Elfadel:
  Post-Quantum, Order-Preserving Encryption for the Confidential Inference in Decision Trees: FPGA Design and Implementation. VLSI-SoC 2023: 1-6
• 
  Safiullah Khan, Ayesha Khalid, Ciara Rafferty, Yasir Ali Shah, Máire O'Neill, Wai-Kong Lee, Seong Oun Hwang:
  Efficient, Error-Resistant NTT Architectures for CRYSTALS-Kyber FPGA Accelerators. VLSI-SoC 2023: 1-6
• 
  Shubham Kumar, Paul R. Genssler, Somaya Mansour, Yogesh Singh Chauhan, Hussam Amrouch:
  Frontiers in AI Acceleration: From Approximate Computing to FeFET Monolithic 3D Integration. VLSI-SoC 2023: 1-6
• 
  Junjie Li, Youming Zhang, Yunqi Cao, Xusheng Tang, Fengyi Huang:
  A Unity Feedback Length-Extend Delta-Sigma Modulator for Fractional-N Frequency Synthesizer. VLSI-SoC 2023: 1-4
• 
  Sejin Lim, Hyunjun Kim, Kyungbae Jang, Siyi Wang, Anubhab Baksi, Anupam Chattopadhyay, Hwajeong Seo:
  Optimized Quantum Circuit Implementation of Payoff Function. VLSI-SoC 2023: 1-6
• 
  Imlijungla Longchar, Hemangee K. Kapoor:
  ADaMaT: Towards an Adaptive Dataflow for Maximising Throughput in Neural Network Inference. VLSI-SoC 2023: 1-6
• 
  Cédric Marchand, Alban Nicolas, Paul-Antoine Matrangolo, David Navarro, Alberto Bosio, Ian O'Connor:
  FeFET based Logic-in-Memory design methodologies, tools and open challenges. VLSI-SoC 2023: 1-6
• 
  Shayesteh Masoumian, Roel Maes, Rui Wang, Karthik Keni Yerriswamy, Geert Jan Schrijen, Said Hamdioui, Mottaqiallah Taouil:
  Modeling and Analysis of SRAM PUF Bias Patterns in 14nm and 7nm FinFET Technology Nodes. VLSI-SoC 2023: 1-6
• 
  Rafael Medina, Darong Huang, Giovanni Ansaloni, Marina Zapater, David Atienza:
  REMOTE: Re-thinking Task Mapping on Wireless 2.5D Systems-on-Package for Hotspot Removal. VLSI-SoC 2023: 1-6
• 
  Cristiano Merio, Xavier Lesage, Ali Naimi, Sylvain Engels, Katell Morin-Allory, Laurent Fesquet:
  Method for Data-Driven Pruning in Micropipeline Circuits. VLSI-SoC 2023: 1-6

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