- Nikos Petrellis, Panagiotis Christakos, Stavros Zogas, Panagiotis Mousouliotis, Georgios Keramidas, Nikolaos S. Voros, Christos P. Antonopoulos:
Challenges Towards Hardware Acceleration of the Deformable Shape Tracking Application. VLSI-SoC 2021: 1-4 - Shubham Rai
, Nishant Gupta, Abhiroop Bhattacharjee, Ansh Rupani, Michael Raitza, Jens Trommer, Thomas Mikolajick, Akash Kumar:
END-TRUE: Emerging Nanotechnology-Based Double-Throughput True Random Number Generator. VLSI-SoC (Selected Papers) 2021: 175-203 - Vikas Rao, Haden Ondricek, Priyank Kalla, Florian Enescu:
Algebraic Techniques for Rectification of Finite Field Circuits. VLSI-SoC 2021: 1-6 - Prasanna Ravi, Anupam Chattopadhyay, Shivam Bhasin:
Practical Side-Channel and Fault Attacks on Lattice-Based Cryptography. VLSI-SoC 2021: 1-2 - Frank Riese, Vladimir Herdt, Daniel Große, Rolf Drechsler:
Metamorphic Testing for Processor Verification: A RISC-V Case Study at the Instruction Level. VLSI-SoC 2021: 1-6 - Julie Roux, Katell Morin-Allory, Vincent Beroulle, Lilian Bossuet, Frédéric Cézilly, Frédéric Berthoz, Gilles Genévrier, François Cerisier, Régis Leveugle:
FMEA on Critical Systems: A Cross-Layer Approach Based on High-Level Models. VLSI-SoC (Selected Papers) 2021: 113-133 - Julie Roux, Katell Morin-Allory, Vincent Beroulle, Régis Leveugle, Lilian Bossuet, Frédéric Cézilly, Frédéric Berthoz, Gilles Genévrier, François Cerisier:
Cross-layer Approach to Assess FMEA on Critical Systems and Evaluate High-Level Model Realism. VLSI-SoC 2021: 1-6 - Akashdeep Saha, Debdeep Mukhopadhyay, Rajat Subhra Chakraborty:
Design and Analysis of Logic Locking Techniques. VLSI-SoC 2021: 1-2 - Siva Satyendra Sahoo, Akash Kumar:
CLEO-CoDe: Exploiting Constrained Decoding for Cross-Layer Energy Optimization in Heterogeneous Embedded Systems. VLSI-SoC 2021: 1-6 - Siva Satyendra Sahoo, Akash Kumar:
Using Monte Carlo Tree Search for EDA - A Case-study with Designing Cross-layer Reliability for Heterogeneous Embedded Systems. VLSI-SoC 2021: 1-6 - Johanna Sepúlveda, Dominik Winkler, Daniel Mauricio Sepúlveda, Mario Cupelli, Radek Olexa:
Post-Quantum Cryptography in MPSoC Environments. VLSI-SoC 2021: 1-6 - Dominik Sisejkovic, Rainer Leupers:
Trustworthy Hardware Design with Logic Locking. VLSI-SoC 2021: 1-2 - Dominik Sisejkovic, Lennart M. Reimann, Elmira Moussavi, Farhad Merchant, Rainer Leupers:
Logic Locking at the Frontiers of Machine Learning: A Survey on Developments and Opportunities. VLSI-SoC 2021: 1-6 - Emmanuel Stapf, Patrick Jauernig, Ferdinand Brasser, Ahmad-Reza Sadeghi:
In Hardware We Trust? From TPM to Enclave Computing on RISC-V. VLSI-SoC 2021: 1-6 - Luca Valente, Davide Rossi, Luca Benini:
Hardware-In-The Loop Emulation for Agile Co-Design of Parallel Ultra-Low Power IoT Processors. VLSI-SoC 2021: 1-6 - Ming Ming Wong, Lu Chen, Anh Tuan Do:
A 25 TOPS/W High Power Efficiency Deterministic and Split Stochastic MAC (SC-MAC) Design. VLSI-SoC 2021: 1-6 - Ming Ming Wong, Lu Chen, Anh Tuan Do:
An Improved Deterministic Stochastic MAC (SC-MAC) for High Power Efficiency Design. VLSI-SoC (Selected Papers) 2021: 245-266 - Jianming Zhao, Yuan Gao:
A 13.56 MHz Active Rectifier with PMOS AC-DC Interface for Wireless Powered Medical Implants. VLSI-SoC 2021: 1-6 - Parya Zolfaghari, Sébastien Le Beux:
A Reconfigurable Nanophotonic Architecture based on Phase Change Material. VLSI-SoC 2021: 1-6 - Parya Zolfaghari, Sébastien Le Beux:
Design of a Reconfigurable Optical Computing Architecture Using Phase Change Material. VLSI-SoC (Selected Papers) 2021: 155-174 - Andrea Calimera, Pierre-Emmanuel Gaillardon, Kunal Korgaonkar, Shahar Kvatinsky, Ricardo Reis:
VLSI-SoC: Design Trends - 28th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2020, Salt Lake City, UT, USA, October 6-9, 2020, Revised and Extended Selected Papers. IFIP Advances in Information and Communication Technology 621, Springer 2021, ISBN 978-3-030-81640-7 [contents] - 29th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2021, Singapore, Singapore, October 4-7, 2021. IEEE 2021, ISBN 978-1-6654-2614-5 [contents]
- 2020
- Amin Aghighi, Behrouz Farhang-Boroujeny, Armin Tajalli:
Energy and Area Efficient Mixed-Mode MCMC MIMO Detector. VLSI-SOC 2020: 105-110 - Amin Aghighi, Behrouz Farhang-Boroujeny, Armin Tajalli:
Mixed-Mode Signal Processing for Implementing MCMC MIMO Detector. VLSI-SoC (Selected Papers) 2020: 21-37 - Amin Aghighi, Massood Tabib-Azar, Armin Tajalli:
An ULP Self-Supplied Brain Interface Circuit. VLSI-SOC 2020: 100-104 - Amin Aghighi, Armin Tajalli, Mohammad Taherzadeh-Sani:
A Low-Power 10 to 15 Gb/s Common-Gate CTLE Based on Optimized Active Inductors. VLSI-SOC 2020: 171-175 - Tutu Ajayi, Sumanth Kamineni, Yaswanth K. Cherivirala, Morteza Fayazi, Kyumin Kwon, Mehdi Saligane, Shourya Gupta, Chien-Hen Chen, Dennis Sylvester, David T. Blaauw, Ronald G. Dreslinski, Benton H. Calhoun, David D. Wentzloff:
An Open-source Framework for Autonomous SoC Design with Analog Block Generation. VLSI-SOC 2020: 141-146 - Tutu Ajayi, Sumanth Kamineni, Morteza Fayazi, Yaswanth K. Cherivirala, Kyumin Kwon, Shourya Gupta, Wenbo Duan, Jeongsup Lee, Chien-Hen Chen, Mehdi Saligane, Dennis Sylvester, David T. Blaauw, Ronald Dreslinski Jr., Benton H. Calhoun, David D. Wentzloff:
Fully-Autonomous SoC Synthesis Using Customizable Cell-Based Analog and Mixed-Signal Circuits Generation. VLSI-SoC (Selected Papers) 2020: 65-85 - N. Nalla Anandakumar, Somitra Kumar Sanadhya, Mohammad S. Hashmi:
Design, Implementation and Analysis of Efficient Hardware-Based Security Primitives. VLSI-SOC 2020: 198-199 - Luca P. Carloni:
Scalable Open-Source System-on-Chip Design: (Invited Talk - Extended Abstract). VLSI-SOC 2020: 7-9
