"Efficient Hardware Architecture of ηT Pairing Accelerator ..."

Szu-Chi Chung et al. (2015)

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DOI: 10.1109/TVLSI.2014.2303489

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type: Journal Article

metadata version: 2021-07-25

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Szu-Chi Chung, Jing-Yu Wu, Hsing-Ping Fu, Jen-Wei Lee, Hsie-Chia Chang, Chen-Yi Lee:
Efficient Hardware Architecture of η_T Pairing Accelerator Over Characteristic Three. IEEE Trans. Very Large Scale Integr. Syst. 23(1): 88-97 (2015)

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