"A 6-ns ECL 100 K I/O and 8-ns 3.3-V TTL I/O 4-Mb BiCMOS SRAM."

Kazuyuki Nakamura et al. (1992)

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DOI: 10.1109/4.165329

access: closed

type: Journal Article

metadata version: 2025-02-03

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Kazuyuki Nakamura, Takashi Oguri, Takao Atsumo, Masahide Takada, Atsushi Ikemoto, Hisamitsu Suzuki, Tadashi Nishigori, Tohru Yamazaki:
A 6-ns ECL 100 K I/O and 8-ns 3.3-V TTL I/O 4-Mb BiCMOS SRAM. IEEE J. Solid State Circuits 27(11): 1504-1510 (1992)

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