"A 0.18-μm 256-Mb DDR-SDRAM with low-cost post-mold tuning method for ..."

Shigehiro Kuge et al. (2000)

> Home

Details and statistics

DOI: 10.1109/4.881215

access: closed

type: Journal Article

metadata version: 2022-04-13

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/KugeKFKMHSHKKKA00
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/KugeKFKMHSHKKKA00
Shigehiro Kuge, Tetsuo Kato, Kiyohiro Furutani, Shigeru Kikuda, Katsuyoshi Mitsui, Takeshi Hamamoto, Jun Setogawa, Kei Hamade, Yuichiro Komiya, Satoshi Kawasaki, Takashi Kono, Teruhiko Amano, Takashi Kubo, Masaru Haraguchi, Yoshito Nakaoka, Mihoko Akiyama, Yasuhiro Konishi, Hideyuki Ozaki, Tsutomu Yoshihara:
A 0.18-μm 256-Mb DDR-SDRAM with low-cost post-mold tuning method for DLL replica. IEEE J. Solid State Circuits 35(11): 1680-1689 (2000)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.