"A 100-MHz 4-Mb cache DRAM with fast copy-back scheme."

Katsumi Dosaka et al. (1992)

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DOI: 10.1109/4.165333

access: closed

type: Journal Article

metadata version: 2025-02-03

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Katsumi Dosaka, Yasuhiro Konishi, Kouji Hayano, Katsumitsu Himukashi, Akira Yamazaki, Hisashi Iwamoto, Masaki Kumanoya, Hisanori Hamano, Tsutomu Yoshihara:
A 100-MHz 4-Mb cache DRAM with fast copy-back scheme. IEEE J. Solid State Circuits 27(11): 1534-1539 (1992)

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