"A 60-ns 3.3-V-only 16-Mbit DRAM with multipurpose register."

Kazutami Arimoto et al. (1989)

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DOI: 10.1109/JSSC.1989.572576

access: closed

type: Journal Article

metadata version: 2024-12-03

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Kazutami Arimoto, Kazuyasu Fujishima, Yoshio Matsuda, Masaki Tsukude, Tukasa Oishi, Wataru Wakamiya, Shin'ichi Satoh, Michihiro Yamada, Takao Nakano:
A 60-ns 3.3-V-only 16-Mbit DRAM with multipurpose register. IEEE J. Solid State Circuits 24(5): 1184-1190 (1989)

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