"Design and Implementation Fine-grained Power Gating on Microprocessor ..."

Zhao Lei et al. (2011)

> Home

Details and statistics

DOI: 10.2197/IPSJTSLDM.4.182

access: closed

type: Journal Article

metadata version: 2024-03-22

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/ipsj/LeiIUNKNA11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ipsj/LeiIUNKNA11
Zhao Lei, Daisuke Ikebuchi, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo, Hiroshi Nakamura, Hideharu Amano:
Design and Implementation Fine-grained Power Gating on Microprocessor Functional Units. IPSJ Trans. Syst. LSI Des. Methodol. 4: 182-192 (2011)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.